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Text File  |  1994-11-07  |  105KB  |  1,209 lines

  1. ;                    A++ OPCODE DATABASE          (c) Schwerzel Control Systems                                                                       
  2. ;                    ===================
  3. ;
  4. ; The Assembler Mnemonics in this database are copyright of Intel Corporation.
  5. ;
  6. ;
  7. ; Incrementing and Decrementing with the REP instructions
  8. ; -------------------------------------------------------
  9. ;
  10. ; DI++            Increment once
  11. ; DI++++          Increment twice
  12. ; DI++++++++      Increment four times
  13. ;
  14. ;
  15. ; Notes for modifying this Database
  16. ; ---------------------------------
  17. ;
  18. ; All comments start with a ";" in the first column
  19. ;
  20. ; You may change the order of the Opcodes, but may not change the
  21. ; register names (AX, etc.) or the wild card names (#rm8, etc.)
  22. ;
  23. ; The Fields in the Database are as follows :-
  24. ;     Byte1    The first byte of the Opcode
  25. ;     Byte2    The Second Byte of the Opcode (0 if unused)
  26. ;     rmOffset rm Offset
  27. ;     REPNE    Prefix required
  28. ;     REPE     Prefix required
  29. ;     32Bit    The Operand Size Prefix is required
  30. ;     Table    This is a Table Type Opcode
  31. ;     CPU      CPU when Opcode was introduced. 0=8086, 2=80286, 3=80386 etc.
  32. ;
  33. ; Several Opcodes have been commented out because they cannot be used by DOS
  34. ;
  35. ;
  36. .DATABASE
  37. ; B  B  r  R R 3 T C ASSEMBLER            APP                                      DESCRIPTION
  38. ; y  y  m  E E 2 a P STRING               STRING                                   STRING
  39. ; t  t  O  P P B b U
  40. ; e  e  f  N E I l
  41. ; 1  2  f  E   T e
  42. ;
  43. ; These are put right at the top of the program so that they get preference
  44. ; over other opcodes which do the same but use more bytes
  45. ;
  46.   A0,00,00,0,0,0,0,0,"MOV AL,#moffs8",    ";AL = #moffs8",                          "Move #moffs8 into AL", 
  47.   A1,00,00,0,0,0,0,0,"MOV AX,#moffs16",   ";AX = #moffs16",                         "Move #moffs16 into AX",
  48.   A1,00,00,0,0,1,0,0,"MOV EAX,#moffs32",  ";EAX = #moffs32",                        "Move #moffs32 into EAX",
  49.   A2,00,00,0,0,0,0,0,"MOV #moffs8,AL",    ";#moffs8 = AL",                          "Move AL into #moffs8",
  50.   A3,00,00,0,0,0,0,0,"MOV #moffs16,AX",   ";#moffs16 = AX",                         "Move AX into #moffs16",
  51.   A3,00,00,0,0,1,0,0,"MOV #moffs32,EAX",  ";#moffs32 = EAX",                        "Move EAX into #moffs32",
  52. ;
  53. ;
  54. ;
  55. ;
  56. ; The Database is in numerical order starting from here
  57. ;
  58.   00,00,00,0,0,0,0,0,"ADD #rm8,#r8",      ";#rm8 = #rm8 + #r8",                     "ADD #r8 to #rm8",
  59.   01,00,00,0,0,0,0,0,"ADD #rm16,#r16",    ";#rm16 = #rm16 + #r16",                  "ADD #r16 to #rm16",
  60.   01,00,00,0,0,1,0,0,"ADD #rm32,#r32",    ";#rm32 = #rm32 + #r32",                  "ADD #r32 to #rm32",
  61.   02,00,00,0,0,0,0,0,"ADD #r8,#rm8",      ";#r8 = #r8 + #rm8",                      "ADD #rm8 to #r8",
  62.   03,00,00,0,0,0,0,0,"ADD #r16,#rm16",    ";#r16 = #r16 + #rm16",                   "ADD #rm16 to #r16",
  63.   03,00,00,0,0,1,0,0,"ADD #r32,#rm32",    ";#r32 = #r32 + #rm32",                   "ADD #rm32 to #r32",
  64.   04,00,00,0,0,0,0,0,"ADD AL,#imm8",      ";AL = AL + #imm8",                       "ADD #imm8 to AL",
  65.   05,00,00,0,0,0,0,0,"ADD AX,#imm16",     ";AX = AX + #imm16",                      "ADD #imm16 to AX",
  66.   05,00,00,0,0,1,0,0,"ADD EAX,#imm32",    ";EAX = EAX + #imm32",                    "ADD #imm32 to EAX",
  67.   06,00,00,0,0,0,0,0,"PUSH ES",           ";PUSH ES",                               "Push ES onto the Stack",
  68.   07,00,00,0,0,0,0,0,"POP ES",            ";POP ES",                                "Pop ES from the Stack",
  69.   08,00,00,0,0,0,0,0,"OR #rm8,#r8",       ";#rm8 = #rm8 OR #r8",                    "OR #r8 to #rm8",
  70.   09,00,00,0,0,0,0,0,"OR #rm16,#r16",     ";#rm16 = #rm16 OR #r16",                 "OR #r16 to #rm16",
  71.   09,00,00,0,0,1,0,0,"OR #rm32,#r32",     ";#rm32 = #rm32 OR #r32",                 "OR #r32 to #rm32",
  72.   0A,00,00,0,0,0,0,0,"OR #r8,#rm8",       ";#r8 = #r8 OR #rm8",                     "OR #rm8 to #r8",
  73.   0B,00,00,0,0,0,0,0,"OR #r16,#rm16",     ";#r16 = #r16 OR #rm16",                  "OR #rm16 to #r16",
  74.   0B,00,00,0,0,1,0,0,"OR #r32,#rm32",     ";#r32 = #r32 OR #rm32",                  "OR #rm32 to #r32",
  75.   0C,00,00,0,0,0,0,0,"OR AL,#imm8",       ";AL = AL OR #imm8",                      "OR #imm8 to AL",
  76.   0D,00,00,0,0,0,0,0,"OR AX,#imm16",      ";AX = AX OR #imm16",                     "OR #imm16 to AX",
  77.   0D,00,00,0,0,1,0,0,"OR EAX,#imm32",     ";EAX = EAX OR #imm32",                   "OR #imm32 to EAX",
  78.   0E,00,00,0,0,0,0,0,"PUSH CS",           ";PUSH CS",                               "Push CS onto the Stack",
  79. ; 0F,00,   0 0, etc. at the end of the Database
  80.   10,00,00,0,0,0,0,0,"ADC #rm8,#r8",      ";#rm8 = #rm8 + #r8 + CARRYFLAG",         "ADD with Carry #r8 to #rm8",
  81.   11,00,00,0,0,0,0,0,"ADC #rm16,#r16",    ";#rm16 = #rm16 + #r16 + CARRYFLAG",      "ADD with Carry #r16 to #rm16",
  82.   11,00,00,0,0,1,0,0,"ADC #rm32,#r32",    ";#rm32 = #rm32 + #r32 + CARRYFLAG",      "ADD with Carry #r32 to #rm32",
  83.   12,00,00,0,0,0,0,0,"ADC #r8,#rm8",      ";#r8 = #r8 + #rm8 + CARRYFLAG",          "ADD with Carry #rm8 to #r8",
  84.   13,00,00,0,0,0,0,0,"ADC #r16,#rm16",    ";#r16 = #r16 + #rm16 + CARRYFLAG",       "ADD with Carry #rm16 to #r16",
  85.   13,00,00,0,0,1,0,0,"ADC #r32,#rm32",    ";#r32 = #r32 + #rm32 + CARRYFLAG",       "ADD with Carry #rm32 to #r32",
  86.   14,00,00,0,0,0,0,0,"ADC AL,#imm8",      ";AL = AL + #imm8 + CARRYFLAG",           "ADD with Carry #imm8 to AL",
  87.   15,00,00,0,0,0,0,0,"ADC AX,#imm16",     ";AX = AX + #imm16 + CARRYFLAG",          "ADD with Carry #imm16 to AX",
  88.   15,00,00,0,0,1,0,0,"ADC EAX,#imm32",    ";EAX = EAX + #imm32 + CARRYFLAG",        "ADD with Carry #imm32 to EAX",
  89.   16,00,00,0,0,0,0,0,"PUSH SS",           ";PUSH SS",                               "Push SS onto the Stack",
  90.   17,00,00,0,0,0,0,0,"POP SS",            ";POP SS",                                "Pop SS from the Stack",
  91.   18,00,00,0,0,0,0,0,"SBB #rm8,#r8",      ";#rm8 = #rm8 - #r8 - CARRYFLAG",         "Subtract with Borrow #r8 from #rm8",
  92.   19,00,00,0,0,0,0,0,"SBB #rm16,#r16",    ";#rm16 = #rm16 - #r16 - CARRYFLAG",      "Subtract with Borrow #r16 from #rm16",
  93.   19,00,00,0,0,1,0,0,"SBB #rm32,#r32",    ";#rm32 = #rm32 - #r32 - CARRYFLAG",      "Subtract with Borrow #r32 from #rm32",
  94.   1A,00,00,0,0,0,0,0,"SBB #r8,#rm8",      ";#r8 = #r8 - #rm8 - CARRYFLAG",          "Subtract with Borrow #rm8 from #r8",
  95.   1B,00,00,0,0,0,0,0,"SBB #r16,#rm16",    ";#r16 = #r16 - #rm16 - CARRYFLAG",       "Subtract with Borrow #rm16 from #r16",
  96.   1B,00,00,0,0,1,0,0,"SBB #r32,#rm32",    ";#r32 = #r32 - #rm32 - CARRYFLAG",       "Subtract with Borrow #rm32 from #r32",
  97.   1C,00,00,0,0,0,0,0,"SBB AL,#imm8",      ";AL = AL - #imm8 - CARRYFLAG",           "Subtract with Borrow #imm8 from AL",
  98.   1D,00,00,0,0,0,0,0,"SBB AX,#imm16",     ";AX = AX  - #imm16 - CARRYFLAG",         "Subtract with Borrow #imm16 from AX",
  99.   1D,00,00,0,0,1,0,0,"SBB EAX,#imm32",    ";EAX = EAX  - #imm32 - CARRYFLAG",       "Subtract with Borrow #imm32 from EAX",
  100.   1E,00,00,0,0,0,0,0,"PUSH DS",           ";PUSH DS",                               "Push DS onto the Stack",
  101.   1F,00,00,0,0,0,0,0,"POP DS",            ";POP DS",                                "Pop DS from the Stack",
  102.   20,00,00,0,0,0,0,0,"AND #rm8,#r8",      ";#rm8 = #rm8 AND #r8",                   "AND #r8 to #rm8",
  103.   21,00,00,0,0,0,0,0,"AND #rm16,#r16",    ";#rm16 = #rm16 AND #r16",                "AND #r16 to #rm16",
  104.   21,00,00,0,0,1,0,0,"AND #rm32,#r32",    ";#rm32 = #rm32 AND #r32",                "AND #r32 to #rm32",
  105.   22,00,00,0,0,0,0,0,"AND #r8,#rm8",      ";#r8 = #r8 AND #rm8",                    "AND #rm8 to #r8",
  106.   23,00,00,0,0,0,0,0,"AND #r16,#rm16",    ";#r16 = #r16 AND #rm16",                 "AND #rm16 to #r16",
  107.   23,00,00,0,0,1,0,0,"AND #r32,#rm32",    ";#r32 = #r32 AND #rm32",                 "AND #rm32 to #r32",
  108.   24,00,00,0,0,0,0,0,"AND AL,#imm8",      ";AL = AL AND #imm8",                     "AND #imm8 to AL",
  109.   25,00,00,0,0,0,0,0,"AND AX,#imm16",     ";AX = AX AND #imm16",                    "AND #imm16 to AX",
  110.   25,00,00,0,0,1,0,0,"AND EAX,#imm32",    ";EAX = EAX AND #imm32",                  "AND #imm32 to EAX",
  111.   27,00,00,0,0,0,0,0,"DAA",               ";DAA",                                   "Decimal Adjust AL after Addition",
  112.   28,00,00,0,0,0,0,0,"SUB #rm8,#r8",      ";#rm8 = #rm8 - #r8",                     "Subtract #r8 from #rm8",
  113.   29,00,00,0,0,0,0,0,"SUB #rm16,#r16",    ";#rm16 = #rm16 - #r16",                  "Subtract #r16 from #rm16",
  114.   29,00,00,0,0,1,0,0,"SUB #rm32,#r32",    ";#rm32 = #rm32 - #r32",                  "Subtract #r32 from #rm32",
  115.   2A,00,00,0,0,0,0,0,"SUB #r8,#rm8",      ";#r8 = #r8 - #rm8",                      "Subtract #rm8 from #r8",
  116.   2B,00,00,0,0,0,0,0,"SUB #r16,#rm16",    ";#r16 = #r16 - #rm16",                   "Subtract #rm16 from #r16",
  117.   2B,00,00,0,0,1,0,0,"SUB #r32,#rm32",    ";#r32 = #r32 - #rm32",                   "Subtract #rm32 from #r32",
  118.   2C,00,00,0,0,0,0,0,"SUB AL,#imm8",      ";AL = AL - #imm8",                       "Subtract #imm8 from AL",
  119.   2D,00,00,0,0,0,0,0,"SUB AX,#imm16",     ";AX = AX - #imm16",                      "Subtract #imm16 from AX",
  120.   2D,00,00,0,0,1,0,0,"SUB EAX,#imm32",    ";EAX = EAX - #imm32",                    "Subtract #imm32 from EAX",
  121.   2F,00,00,0,0,0,0,0,"DAS",               ";DAS",                                   "Decimal Adjust AL after Subtraction",
  122.   30,00,00,0,0,0,0,0,"XOR #rm8,#r8",      ";#rm8 = #rm8 XOR #r8",                   "Exclusive OR #r8 to #rm8",
  123.   31,00,00,0,0,0,0,0,"XOR #rm16,#r16",    ";#rm16 = #rm16 XOR #r16",                "Exclusive OR #r16 to #rm16",
  124.   31,00,00,0,0,1,0,0,"XOR #rm32,#r32",    ";#rm32 = #rm32 XOR #r32",                "Exclusive OR #r32 to #rm32",
  125.   32,00,00,0,0,0,0,0,"XOR #r8,#rm8",      ";#r8 = #r8 XOR #rm8",                    "Exclusive OR #rm8 to #r8",
  126.   33,00,00,0,0,0,0,0,"XOR #r16,#rm16",    ";#r16 = #r16 XOR #rm16",                 "Exclusive OR #rm16 to #r16",
  127.   33,00,00,0,0,1,0,0,"XOR #r32,#rm32",    ";#r32 = #r32 XOR #rm32",                 "Exclusive OR #rm32 to #r32",
  128.   34,00,00,0,0,0,0,0,"XOR AL,#imm8",      ";AL = AL XOR #imm8",                     "Exclusive OR #imm8 to AL",
  129.   35,00,00,0,0,0,0,0,"XOR AX,#imm16",     ";AX = AX XOR #imm16",                    "Exclusive OR #imm16 to AX",
  130.   35,00,00,0,0,1,0,0,"XOR EAX,#imm32",    ";EAX = EAX XOR #imm32",                  "Exclusive OR #imm32 to EAX",
  131.   37,00,00,0,0,0,0,0,"AAA",               ";AAA",                                   "ASCII Adjust AL after Addition",
  132.   38,00,00,0,0,0,0,0,"CMP #rm8,#r8",      "COMPARE #rm8 WITH #r8",                 "Compare #r8 with #rm8",
  133.   39,00,00,0,0,0,0,0,"CMP #rm16,#r16",    "COMPARE #rm16 WITH #r16",               "Compare #r16 with #rm16",
  134.   39,00,00,0,0,1,0,0,"CMP #rm32,#r32",    "COMPARE #rm32 WITH #r32",               "Compare #r32 with #rm32",
  135.   3A,00,00,0,0,0,0,0,"CMP #r8,#rm8",      "COMPARE #r8 WITH #rm8",                 "Compare #rm8 with #r8",
  136.   3B,00,00,0,0,0,0,0,"CMP #r16,#rm16",    "COMPARE #r16 WITH #rm16",               "Compare #rm16 with #r16",
  137.   3B,00,00,0,0,1,0,0,"CMP #r32,#rm32",    "COMPARE #r32 WITH #rm32",               "Compare #rm32 with #r32",
  138.   3C,00,00,0,0,0,0,0,"CMP AL,#imm8",      "COMPARE AL WITH #imm8",                 "Compare #imm8 with AL",
  139.   3D,00,00,0,0,0,0,0,"CMP AX,#imm16",     "COMPARE AX WITH #imm16",                "Compare #imm16 with AX",
  140.   3D,00,00,0,0,1,0,0,"CMP EAX,#imm32",    "COMPARE EAX WITH #imm32",               "Compare #imm32 with EAX",
  141.   3F,00,00,0,0,0,0,0,"AAS",               ";AAS",                                   "ASCII Adjust AL after Subtraction",
  142.   40,00,00,0,0,0,0,0,"INC AX",            "AX++",                                  "Increment AX",
  143.   40,00,00,0,0,1,0,0,"INC EAX",           "EAX++",                                 "Increment EAX",
  144.   41,00,00,0,0,0,0,0,"INC CX",            "CX++",                                  "Increment CX",
  145.   41,00,00,0,0,1,0,0,"INC ECX",           "ECX++",                                 "Increment ECX",
  146.   42,00,00,0,0,0,0,0,"INC DX",            "DX++",                                  "Increment DX",
  147.   42,00,00,0,0,1,0,0,"INC EDX",           "EDX++",                                 "Increment EDX",
  148.   43,00,00,0,0,0,0,0,"INC BX",            "BX++",                                  "Increment BX",
  149.   43,00,00,0,0,1,0,0,"INC EBX",           "EBX++",                                 "Increment EBX",
  150.   44,00,00,0,0,0,0,0,"INC SP",            "SP++",                                  "Increment SP",
  151.   44,00,00,0,0,1,0,0,"INC ESP",           "ESP++",                                 "Increment ESP",
  152.   45,00,00,0,0,0,0,0,"INC BP",            "BP++",                                  "Increment BP",
  153.   45,00,00,0,0,1,0,0,"INC EBP",           "EBP++",                                 "Increment EBP",
  154.   46,00,00,0,0,0,0,0,"INC SI",            "SI++",                                  "Increment SI",
  155.   46,00,00,0,0,1,0,0,"INC ESI",           "ESI++",                                 "Increment ESI",
  156.   47,00,00,0,0,0,0,0,"INC DI",            "DI++",                                  "Increment DI",
  157.   47,00,00,0,0,1,0,0,"INC EDI",           "EDI++",                                 "Increment EDI",
  158.   48,00,00,0,0,0,0,0,"DEC AX",            "AX--",                                  "Decrement AX",
  159.   48,00,00,0,0,1,0,0,"DEC EAX",           "EAX--",                                 "Decrement EAX",
  160.   49,00,00,0,0,0,0,0,"DEC CX",            "CX--",                                  "Decrement CX",
  161.   49,00,00,0,0,1,0,0,"DEC ECX",           "ECX--",                                 "Decrement ECX",
  162.   4A,00,00,0,0,0,0,0,"DEC DX",            "DX--",                                  "Decrement DX",
  163.   4A,00,00,0,0,1,0,0,"DEC EDX",           "EDX--",                                 "Decrement EDX",
  164.   4B,00,00,0,0,0,0,0,"DEC BX",            "BX--",                                  "Decrement BX",
  165.   4B,00,00,0,0,1,0,0,"DEC EBX",           "EBX--",                                 "Decrement EBX",
  166.   4C,00,00,0,0,0,0,0,"DEC SP",            "SP--",                                  "Decrement SP",
  167.   4C,00,00,0,0,1,0,0,"DEC ESP",           "ESP--",                                 "Decrement ESP",
  168.   4D,00,00,0,0,0,0,0,"DEC BP",            "BP--",                                  "Decrement BP",
  169.   4D,00,00,0,0,1,0,0,"DEC EBP",           "EBP--",                                 "Decrement EBP",
  170.   4E,00,00,0,0,0,0,0,"DEC SI",            "SI--",                                  "Decrement SI",
  171.   4E,00,00,0,0,1,0,0,"DEC ESI",           "ESI--",                                 "Decrement ESI",
  172.   4F,00,00,0,0,0,0,0,"DEC DI",            "DI--",                                  "Decrement DI",
  173.   4F,00,00,0,0,1,0,0,"DEC EDI",           "EDI--",                                 "Decrement EDI",
  174.   50,00,00,0,0,0,0,0,"PUSH AX",           ";PUSH AX",                               "PUSH AX onto the Stack",
  175.   50,00,00,0,0,1,0,0,"PUSH EAX",          ";PUSH EAX",                              "PUSH EAX onto the Stack",
  176.   51,00,00,0,0,0,0,0,"PUSH CX",           ";PUSH CX",                               "PUSH CX onto the Stack",
  177.   51,00,00,0,0,1,0,0,"PUSH ECX",          ";PUSH ECX",                              "PUSH ECX onto the Stack",
  178.   52,00,00,0,0,0,0,0,"PUSH DX",           ";PUSH DX",                               "PUSH DX onto the Stack",
  179.   52,00,00,0,0,1,0,0,"PUSH EDX",          ";PUSH EDX",                              "PUSH EDX onto the Stack",
  180.   53,00,00,0,0,0,0,0,"PUSH BX",           ";PUSH BX",                               "PUSH BX onto the Stack",
  181.   53,00,00,0,0,1,0,0,"PUSH EBX",          ";PUSH EBX",                              "PUSH EBX onto the Stack",
  182.   54,00,00,0,0,0,0,0,"PUSH SP",           ";PUSH SP",                               "PUSH SP onto the Stack",
  183.   54,00,00,0,0,1,0,0,"PUSH ESP",          ";PUSH ESP",                              "PUSH ESP onto the Stack",
  184.   55,00,00,0,0,0,0,0,"PUSH BP",           ";PUSH BP",                               "PUSH BP onto the Stack",
  185.   55,00,00,0,0,1,0,0,"PUSH EBP",          ";PUSH EBP",                              "PUSH EBP onto the Stack",
  186.   56,00,00,0,0,0,0,0,"PUSH SI",           ";PUSH SI",                               "PUSH SI onto the Stack",
  187.   56,00,00,0,0,1,0,0,"PUSH ESI",          ";PUSH ESI",                              "PUSH ESI onto the Stack",
  188.   57,00,00,0,0,0,0,0,"PUSH DI",           ";PUSH DI",                               "PUSH DI onto the Stack",
  189.   57,00,00,0,0,1,0,0,"PUSH EDI",          ";PUSH EDI",                              "PUSH EDI onto the Stack",
  190.   58,00,00,0,0,0,0,0,"POP AX",            ";POP AX",                                "POP AX from the Stack",
  191.   58,00,00,0,0,1,0,0,"POP EAX",           ";POP EAX",                               "POP EAX from the Stack",
  192.   59,00,00,0,0,0,0,0,"POP CX",            ";POP CX",                                "POP CX from the Stack",
  193.   59,00,00,0,0,1,0,0,"POP ECX",           ";POP ECX",                               "POP ECX from the Stack",
  194.   5A,00,00,0,0,0,0,0,"POP DX",            ";POP DX",                                "POP DX from the Stack",
  195.   5A,00,00,0,0,1,0,0,"POP EDX",           ";POP EDX",                               "POP EDX from the Stack",
  196.   5B,00,00,0,0,0,0,0,"POP BX",            ";POP BX",                                "POP BX from the Stack",
  197.   5B,00,00,0,0,1,0,0,"POP EBX",           ";POP EBX",                               "POP EBX from the Stack",
  198.   5C,00,00,0,0,0,0,0,"POP SP",            ";POP SP",                                "POP SP from the Stack",
  199.   5C,00,00,0,0,1,0,0,"POP ESP",           ";POP ESP",                               "POP ESP from the Stack",
  200.   5D,00,00,0,0,0,0,0,"POP BP",            ";POP BP",                                "POP BP from the Stack",
  201.   5D,00,00,0,0,1,0,0,"POP EBP",           ";POP EBP",                               "POP EBP from the Stack",
  202.   5E,00,00,0,0,0,0,0,"POP SI",            ";POP SI",                                "POP SI from the Stack",
  203.   5E,00,00,0,0,1,0,0,"POP ESI",           ";POP ESI",                               "POP ESI from the Stack",
  204.   5F,00,00,0,0,0,0,0,"POP DI",            ";POP DI",                                "POP DI from the Stack",
  205.   5F,00,00,0,0,1,0,0,"POP EDI",           ";POP EDI",                               "POP EDI from the Stack",
  206.   60,00,00,0,0,0,0,1,"PUSHA",             "PUSH ALL",                              "PUSH All the General CPU Registers",
  207.   60,00,00,0,0,1,0,1,"PUSHAD",            "PUSH ALLD",                             "PUSH All the Extended General CPU Registers",
  208.   61,00,00,0,0,0,0,1,"POPA",              "POP ALL",                               "POP All the General CPU Registers",
  209.   61,00,00,0,0,1,0,1,"POPAD",             "POP ALLD",                              "POP All the Extended General CPU Registers",
  210.   62,00,00,0,0,0,0,1,"BOUND #r16,#rm16",  ";BOUND #r16,#rm16",                      "If Array Index out of Bound then call INT 5",
  211.   62,00,00,0,0,1,0,1,"BOUND #r32,#rm32",  ";BOUND #r32,#rm32",                      "If Array Index out of Bound then call INT 5",
  212.   63,00,00,0,0,0,0,2,"ARPL #rm16,#r16",   ";ARPL #rm16,#r16",                       "Adjust RPL Field of Selector",
  213.   68,00,00,0,0,0,0,1,"PUSH WORD #imm16",  "PUSH #imm16",                           "PUSH #imm16 onto the Stack",
  214.   68,00,00,0,0,1,0,1,"PUSH DWORD #imm32", ";PUSH DWORD #imm32",                     "PUSH #imm32 onto the Stack",
  215.   69,00,00,0,0,0,0,1,"IMUL #r16,#rm16,#imm16","#r16 = #rm16 * #imm16",             "#r16 = #rm16 * #imm16",
  216.   69,00,00,0,0,1,0,1,"IMUL #r32,#rm32,#imm32","#r32 = #rm32 * #imm32",             "#r32 = #rm32 * #imm32",
  217.   6A,00,00,0,0,0,0,1,"PUSH BYTE #imm8",   ";PUSH BYTE #imm8",                       "PUSH #imm8 onto the Stack",
  218.   6B,00,00,0,0,0,0,1,"IMUL #r16,#rm16,#imm8","#r16 = #rm16 * #imm8",               "#r16 = #rm16 * #imm8",
  219.   6B,00,00,0,0,1,0,1,"IMUL #r32,#rm32,#imm8","#r32 = #rm32 * #imm8",               "#r32 = #rm32 * #imm8",
  220.   6C,00,00,0,0,0,0,1,"INSB",              "E1[DI++] = GETBYTEFROMPORT(DX)",        "Input Byte from Port DX into E1[DI] and update DI",
  221.   6C,00,00,0,1,0,0,1,"REP INSB",          "WHILE CX <> 0 : CX-- : E1[DI++] = GETBYTEFROMPORT ( DX ) : WEND",       "Read CX Bytes from Port DX",
  222.   6D,00,00,0,0,0,0,1,"INSW",              "E2[DI++++] = GETWORDFROMPORT(DX)",      "Input Word from Port DX into E2[DI] and update DI",
  223.   6D,00,00,0,0,1,0,1,"INSD",              "E4[DI++++++++] = GETDWORDFROMPORT(DX)", "Input DWord from Port DX into E4[DI] and update DI",
  224.   6D,00,00,0,1,0,0,1,"REP INSW",          "WHILE CX <> 0 : CX-- : E2[DI++++] = GETWORDFROMPORT ( DX ) : WEND",     "Read CX Words from Port DX",
  225.   6D,00,00,0,1,1,0,1,"REP INSD",          "WHILE CX <> 0 : CX-- : E4[DI++++++++] = GETDWORDFROMPORT ( DX ) : WEND","Read CX DWords from Port DX",
  226.   6E,00,00,0,0,0,0,1,"OUTSB",             "WRITEBYTETOPORT(DX,D1[SI++])",          "Output Byte D1[SI] to Port DX and update SI",
  227.   6E,00,00,0,1,0,0,1,"REP OUTSB",         "WHILE CX <> 0 : CX-- : WRITEBYTETOPORT ( DX D1[SI++] ) : WEND",         "Write CX Bytes to Port DX",
  228.   6F,00,00,0,0,0,0,1,"OUTSW",             "WRITEWORDTOPORT(DX,D2[SI++++])",        "Output Word D2[SI] to Port DX and update SI",
  229.   6F,00,00,0,0,1,0,1,"OUTSD",             "WRITEDWORDTOPORT(DX,D4[SI++++++++])",   "Output DWord D4[SI] to Port DX and update SI",
  230.   6F,00,00,0,1,0,0,1,"REP OUTSW",         "WHILE CX <> 0 : CX-- : WRITEWORDTOPORT ( DX D2[SI++++] ) : WEND",       "Write CX Words to Port DX",
  231.   6F,00,00,0,1,1,0,1,"REP OUTSD",         "WHILE CX <> 0 : CX-- : WRITEDWORDTOPORT ( DX D4[SI++++++++] ) : WEND",  "Write CX DWords to Port DX",
  232.   70,00,00,0,0,0,0,3,"JO #rel8",          ";IF #NOTNOT# OVERFLOWFLAG THEN GOTO #rel8", "Jump to #rel8 if Overflow",
  233.   71,00,00,0,0,0,0,3,"JNO #rel8",         ";IF #NOT# OVERFLOWFLAG THEN GOTO #rel8", "Jump to #rel8 if No Overflow",
  234.   72,00,00,0,0,0,0,3,"JC #rel8",          ";IF #NOTNOT# CARRYFLAG THEN GOTO #rel8", "Jump to #rel8 if Carry Flag",
  235.   72,00,00,0,0,0,0,3,"JB #rel8",          ";JB #rel8",                              "Jump to #rel8 if Below (Unsigned)",
  236.   72,00,00,0,0,0,0,3,"JNAE #rel8",        ";JNAE #rel8",                            "Jump to #rel8 if Not Above or Equal (Unsigned)",
  237.   73,00,00,0,0,0,0,3,"JNC #rel8",         ";IF #NOT# CARRYFLAG THEN GOTO #rel8",    "Jump to #rel8 if Not Carry Flag",
  238.   73,00,00,0,0,0,0,3,"JAE #rel8",         ";JAE #rel8",                             "Jump to #rel8 if Above or Equal (Unsigned)",
  239.   73,00,00,0,0,0,0,3,"JNB #rel8",         ";JNB #rel8",                             "Jump to #rel8 if Not Below (Unsigned)",
  240.   74,00,00,0,0,0,0,3,"JZ #rel8",          ";IF #NOTNOT# ZEROFLAG THEN GOTO #rel8",  "Jump to #rel8 if Zero Flag",
  241.   74,00,00,0,0,0,0,3,"JE #rel8",          ";JE #rel8",                              "Jump to #rel8 if Equal",
  242.   75,00,00,0,0,0,0,3,"JNZ #rel8",         ";IF #NOT# ZEROFLAG THEN GOTO #rel8",     "Jump to #rel8 if Not Zero Flag",
  243.   75,00,00,0,0,0,0,3,"JNE #rel8",         ";JNE #rel8",                             "Jump to #rel8 if Not Equal",
  244.   76,00,00,0,0,0,0,3,"JBE #rel8",         ";JBE #rel8",                             "Jump to #rel8 if Below Or Equal (Unsigned)",
  245.   76,00,00,0,0,0,0,3,"JNA #rel8",         ";JNA #rel8",                             "Jump to #rel8 if Not Above (Unsigned)",
  246.   77,00,00,0,0,0,0,3,"JA #rel8",          ";JA #rel8",                              "Jump to #rel8 if Above (Unsigned)",
  247.   77,00,00,0,0,0,0,3,"JNBE #rel8",        ";JNBE #rel8",                            "Jump to #rel8 if Not Below or Equal (Unsigned)",
  248.   78,00,00,0,0,0,0,3,"JS #rel8",          ";IF #NOTNOT# SIGNFLAG THEN GOTO #rel8",  "Jump to #rel8 if Sign",
  249.   79,00,00,0,0,0,0,3,"JNS #rel8",         ";IF #NOT# SIGNFLAG THEN GOTO #rel8",     "Jump to #rel8 if Not Sign",
  250.   7A,00,00,0,0,0,0,3,"JP #rel8",          ";IF #NOTNOT# PARITY THEN GOTO #rel8",    "Jump to #rel8 if Parity Flag",
  251.   7A,00,00,0,0,0,0,3,"JPE #rel8",         ";JPE #rel8",                             "Jump to #rel8 if Parity Even",
  252.   7B,00,00,0,0,0,0,3,"JNP #rel8",         ";IF #NOT# PARITY THEN GOTO #rel8",       "Jump to #rel8 if Not Parity Flag",
  253.   7B,00,00,0,0,0,0,3,"JPO #rel8",         ";JPO #rel8",                             "Jump to #rel8 if Parity Odd",
  254.   7C,00,00,0,0,0,0,3,"JL #rel8",          ";JL #rel8",                              "Jump to #rel8 if Less",
  255.   7C,00,00,0,0,0,0,3,"JNGE #rel8",        ";JNGE #rel8",                            "Jump to #rel8 if Not Greater than or Equal",
  256.   7D,00,00,0,0,0,0,3,"JGE #rel8",         ";JGE #rel8",                             "Jump to #rel8 if Greater Than Or Equal",
  257.   7D,00,00,0,0,0,0,3,"JNL #rel8",         ";JNL #rel8",                             "Jump to #rel8 if Not Less",
  258.   7E,00,00,0,0,0,0,3,"JLE #rel8",         ";JLE #rel8",                             "Jump to #rel8 if Less Or Equal",
  259.   7E,00,00,0,0,0,0,3,"JNG #rel8",         ";JNG #rel8",                             "Jump to #rel8 if Not Greater Than",
  260.   7F,00,00,0,0,0,0,3,"JG #rel8",          ";JG #rel8",                              "Jump to #rel8 if Greater",
  261.   7F,00,00,0,0,0,0,3,"JNLE #rel8",        ";JNLE #rel8",                            "Jump to #rel8 if Not Less Than or Equal",
  262.   80,00,00,0,0,0,1,0,"ADD #rm8,#imm8",    ";#rm8 = #rm8 + #imm8",                   "ADD #imm8 to #rm8",
  263.   80,00,08,0,0,0,1,0,"OR #rm8,#imm8",     ";#rm8 = #rm8 OR #imm8",                  "OR #imm8 to #rm8",
  264.   80,00,10,0,0,0,1,0,"ADC #rm8,#imm8",    ";#rm8 = #rm8 + #imm8 + CARRYFLAG",       "Add with Carry #imm8 to #rm8",
  265.   80,00,18,0,0,0,1,0,"SBB #rm8,#imm8",    ";#rm8 = #rm8 - #imm8 - CARRYFLAG",       "Subtract with Borrow #imm8 from #rm8",
  266.   80,00,20,0,0,0,1,0,"AND #rm8,#imm8",    ";#rm8 = #rm8 AND #imm8",                 "AND #imm8 to #rm8",
  267.   80,00,28,0,0,0,1,0,"SUB #rm8,#imm8",    ";#rm8 = #rm8 - #imm8",                   "Subtract #imm8 from #rm8",
  268.   80,00,30,0,0,0,1,0,"XOR #rm8,#imm8",    ";#rm8 = #rm8 XOR #imm8",                 "Exclusive OR #imm8 to #rm8",
  269.   80,00,38,0,0,0,1,0,"CMP #rm8,#imm8",    "COMPARE #rm8 WITH #imm8",               "Compare #rm8 with #imm8",
  270.   81,00,00,0,0,0,1,0,"ADD #rm16,#imm16",  ";#rm16 = #rm16 + #imm16",                "ADD #imm16 to #rm16",
  271.   81,00,00,0,0,1,1,0,"ADD #rm32,#imm32",  ";#rm32 = #rm32 + #imm32",                "ADD #imm32 to #rm32",
  272.   81,00,08,0,0,0,1,0,"OR #rm16,#imm16",   ";#rm16 = #rm16 OR #imm16",               "OR #imm16 to #rm16",
  273.   81,00,08,0,0,1,1,0,"OR #rm32,#imm32",   ";#rm32 = #rm32 OR #imm32",               "OR #imm32 to #rm32",
  274.   81,00,10,0,0,0,1,0,"ADC #rm16,#imm16",  ";#rm16 = #rm16 + #imm16 + CARRYFLAG",    "Add with Carry #imm16 to #rm16",
  275.   81,00,10,0,0,1,1,0,"ADC #rm32,#imm32",  ";#rm32 = #rm32 + #imm32 + CARRYFLAG",    "Add with Carry #imm32 to #rm32",
  276.   81,00,18,0,0,0,1,0,"SBB #rm16,#imm16",  ";#rm16 = #rm16 - #imm16 - CARRYFLAG",    "Subtract with Borrow #imm16 from #rm16",
  277.   81,00,18,0,0,1,1,0,"SBB #rm32,#imm32",  ";#rm32 = #rm32 - #imm32 - CARRYFLAG",    "Subtract with Borrow #imm32 from #rm32",
  278.   81,00,20,0,0,0,1,0,"AND #rm16,#imm16",  ";#rm16 = #rm16 AND #imm16",              "AND #imm16 to #rm16",
  279.   81,00,20,0,0,1,1,0,"AND #rm32,#imm32",  ";#rm32 = #rm32 AND #imm32",              "AND #imm32 to #rm32",
  280.   81,00,28,0,0,0,1,0,"SUB #rm16,#imm16",  ";#rm16 = #rm16 - #imm16",                "Subtract #imm16 from rm16",
  281.   81,00,28,0,0,1,1,0,"SUB #rm32,#imm32",  ";#rm32 = #rm32 - #imm32",                "Subtract #imm32 from rm32",
  282.   81,00,30,0,0,0,1,0,"XOR #rm16,#imm16",  ";#rm16 = #rm16 XOR #imm16",              "Exclusive OR #imm16 to #rm16",
  283.   81,00,30,0,0,1,1,0,"XOR #rm32,#imm32",  ";#rm32 = #rm32 XOR #imm32",              "Exclusive OR #imm32 to #rm32",
  284.   81,00,38,0,0,0,1,0,"CMP #rm16,#imm16",  "COMPARE #rm16 WITH #imm16",             "Compare #rm16 with #imm16",
  285.   81,00,38,0,0,1,1,0,"CMP #rm32,#imm32",  "COMPARE #rm32 WITH #imm32",             "Compare #rm32 with #imm32",
  286.   83,00,00,0,0,0,1,0,"ADD #rm16,#imm8",   ";#rm16 = #rm16 + #imm8",                 "ADD #imm8 to #rm16",
  287.   83,00,00,0,0,1,1,0,"ADD #rm32,#imm8",   ";#rm32 = #rm32 + #imm8",                 "ADD #imm8 to #rm32",
  288.   83,00,08,0,0,0,1,0,"OR #rm16,#imm8",    ";#rm16 = #rm16 OR #imm8",                "OR #imm8 to #rm16",
  289.   83,00,08,0,0,1,1,0,"OR #rm32,#imm8",    ";#rm32 = #rm32 OR #imm8",                "OR #imm8 to #rm32",
  290.   83,00,10,0,0,0,1,0,"ADC #rm16,#imm8",   ";#rm16 = #rm16 + #imm8 + CARRYFLAG",     "Add with Carry #imm8 to #rm16",
  291.   83,00,10,0,0,1,1,0,"ADC #rm32,#imm8",   ";#rm32 = #rm32 + #imm8 + CARRYFLAG",     "Add with Carry #imm8 to #rm32",
  292.   83,00,18,0,0,0,1,0,"SBB #rm16,#imm8",   ";#rm16 = #rm16 - #imm8 - CARRYFLAG",     "Subtract with Borrow #imm8 from #rm16",
  293.   83,00,18,0,0,1,1,0,"SBB #rm32,#imm8",   ";#rm32 = #rm32 - #imm8 - CARRYFLAG",     "Subtract with Borrow #imm8 from #rm32",
  294.   83,00,20,0,0,0,1,0,"AND #rm16,#imm8",   ";#rm16 = #rm16 AND #imm8",               "AND #imm8 to #rm16",
  295.   83,00,20,0,0,1,1,0,"AND #rm32,#imm8",   ";#rm32 = #rm32 AND #imm8",               "AND #imm8 to #rm32",
  296.   83,00,28,0,0,0,1,0,"SUB #rm16,#imm8",   ";#rm16 = #rm16 - #imm8",                 "Subtract #imm8 from #rm16",
  297.   83,00,28,0,0,1,1,0,"SUB #rm32,#imm8",   ";#rm32 = #rm32 - #imm8",                 "Subtract #imm8 from #rm32",
  298.   83,00,30,0,0,0,1,0,"XOR #rm16,#imm8",   ";#rm16 = #rm16 XOR #imm8",               "Exclusive OR #imm8 to #rm16",
  299.   83,00,30,0,0,1,1,0,"XOR #rm32,#imm8",   ";#rm32 = #rm32 XOR #imm8",               "Exclusive OR #imm8 to #rm32",
  300.   83,00,38,0,0,0,1,0,"CMP #rm16,#imm8",   "COMPARE #rm16 WITH #imm8",              "Compare #rm16 with #imm8",
  301.   83,00,38,0,0,1,1,0,"CMP #rm32,#imm8",   "COMPARE #rm32 WITH #imm8",              "Compare #rm32 with #imm8",
  302.   84,00,00,0,0,0,0,0,"TEST #r8,#rm8",     "TEST #r8 WITH #rm8",                    "TEST (AND) #r8 against #rm8",
  303.   84,00,00,0,0,0,0,0,"TEST #rm8,#r8",     "TEST #rm8 WITH #r8",                    "TEST (AND) #rm8 against #r8",
  304.   85,00,00,0,0,0,0,0,"TEST #r16,#rm16",   "TEST #r16 WITH #rm16",                  "TEST (AND) #r16 against #rm16",
  305.   85,00,00,0,0,0,0,0,"TEST #rm16,#r16",   "TEST #rm16 WITH #r16",                  "TEST (AND) #rm16 against #r16",
  306.   85,00,00,0,0,1,0,0,"TEST #r32,#rm32",   "TEST #r32 WITH #rm32",                  "TEST (AND) #r32 against #rm32",
  307.   85,00,00,0,0,1,0,0,"TEST #rm32,#r32",   "TEST #rm32 WITH #r32",                  "TEST (AND) #rm32 against #r32",
  308.   86,00,00,0,0,0,0,0,"XCHG #r8,#rm8",     "EXCHANGE #r8 WITH #rm8",                "Exchange #r8 with #rm8",
  309.   86,00,00,0,0,0,0,0,"XCHG #rm8,#r8",     "EXCHANGE #rm8 WITH #r8",                "Exchange #rm8 with #r8",
  310.   87,00,00,0,0,0,0,0,"XCHG #r16,#rm16",   "EXCHANGE #r16 WITH #rm16",              "Exchange #r16 with #rm16",
  311.   87,00,00,0,0,0,0,0,"XCHG #rm16,#r16",   "EXCHANGE #rm16 WITH #r16",              "Exchange #rm16 with #r16",
  312.   87,00,00,0,0,1,0,0,"XCHG #r32,#rm32",   "EXCHANGE #r32 WITH #rm32",              "Exchange #r32 with #rm32",
  313.   87,00,00,0,0,1,0,0,"XCHG #rm32,#r32",   "EXCHANGE #rm32 WITH #r32",              "Exchange #rm32 with #r32",
  314.   88,00,00,0,0,0,0,0,"MOV #rm8,#r8",      ";#rm8 = #r8",                            "Move #r8 into #rm8",
  315.   89,00,00,0,0,0,0,0,"MOV #rm16,#r16",    ";#rm16 = #r16",                          "Move #r16 into #rm16",
  316.   89,00,00,0,0,1,0,0,"MOV #rm32,#r32",    ";#rm32 = #r32",                          "Move #r32 into #rm32",
  317.   8A,00,00,0,0,0,0,0,"MOV #r8,#rm8",      ";#r8 = #rm8",                            "Move #rm8 into #r8",
  318.   8B,00,00,0,0,0,0,0,"MOV #r16,#rm16",    ";#r16 = #rm16",                          "Move #rm16 into #r16",
  319.   8B,00,00,0,0,1,0,0,"MOV #r32,#rm32",    ";#r32 = #rm32",                          "Move #rm32 into #r32",
  320.   8C,00,00,0,0,0,0,0,"MOV #rm16,#sreg",   ";#rm16 = #sreg",                         "Move #sreg into #rm16",
  321.   8D,00,00,0,0,0,0,0,"LEA #r16,#rm8",     "#r16 = ADDRESSOF(#rm8)",                "#r16 = Effective Address of #rm8",
  322.   8D,00,00,0,0,0,0,0,"LEA #r16,#rm16",    "#r16 = ADDRESSOF(#rm16)",               "#r16 = Effective Address of #rm16",
  323.   8D,00,00,0,0,0,0,0,"LEA #r16,#rm32",    "#r16 = ADDRESSOF(#rm32)",               "#r16 = Effective Address of #rm32",
  324.   8D,00,00,0,0,0,0,0,"LEA #r16,#rm64",    "#r16 = ADDRESSOF(#rm64)",               "#r16 = Effective Address of #rm64",
  325. ; 8D,00,00,0,0,1,0,0,"LEA #r32,#rm8",     "#r32 = ADDRESSOF(#rm8)",                "#r32 = Effective Address of #rm8",
  326.   8E,00,00,0,0,0,0,0,"MOV #sreg,#rm16",   ";#sreg = #rm16",                         "Move #rm16 into #sreg",
  327.   8F,00,00,0,0,0,0,0,"POP #rm16",         ";POP #rm16",                             "POP #rm16 from the Stack",
  328.   8F,00,00,0,0,1,0,0,"POP #rm32",         ";POP #rm32",                             "POP #rm32 from the Stack",
  329.   90,00,00,0,0,0,0,0,"NOP",               ";NOP",                                   "No Operation",
  330.   91,00,00,0,0,0,0,0,"XCHG CX,AX",        "EXCHANGE CX WITH AX",                   "Exchange CX with AX",
  331.   91,00,00,0,0,1,0,0,"XCHG ECX,EAX",      "EXCHANGE ECX WITH EAX",                 "Exchange ECX with EAX",
  332.   92,00,00,0,0,0,0,0,"XCHG DX,AX",        "EXCHANGE DX WITH AX",                   "Exchange DX with AX",
  333.   92,00,00,0,0,1,0,0,"XCHG EDX,EAX",      "EXCHANGE EDX WITH EAX",                 "Exchange EDX with EAX",
  334.   93,00,00,0,0,0,0,0,"XCHG BX,AX",        "EXCHANGE BX WITH AX",                   "Exchange BX with AX",
  335.   93,00,00,0,0,1,0,0,"XCHG EBX,EAX",      "EXCHANGE EBX WITH EAX",                 "Exchange EBX with EAX",
  336.   94,00,00,0,0,0,0,0,"XCHG SP,AX",        "EXCHANGE SP WITH AX",                   "Exchange SP with AX",
  337.   94,00,00,0,0,1,0,0,"XCHG ESP,EAX",      "EXCHANGE ESP WITH EAX",                 "Exchange ESP with EAX",
  338.   95,00,00,0,0,0,0,0,"XCHG BP,AX",        "EXCHANGE BP WITH AX",                   "Exchange BP with AX",
  339.   95,00,00,0,0,1,0,0,"XCHG EBP,EAX",      "EXCHANGE EBP WITH EAX",                 "Exchange EBP with EAX",
  340.   96,00,00,0,0,0,0,0,"XCHG SI,AX",        "EXCHANGE SI WITH AX",                   "Exchange SI with AX",
  341.   96,00,00,0,0,1,0,0,"XCHG ESI,EAX",      "EXCHANGE ESI WITH EAX",                 "Exchange ESI with EAX",
  342.   97,00,00,0,0,0,0,0,"XCHG DI,AX",        "EXCHANGE DI WITH AX",                   "Exchange DI with AX",
  343.   97,00,00,0,0,1,0,0,"XCHG EDI,EAX",      "EXCHANGE EDI WITH EAX",                 "Exchange EDI with EAX",
  344.   98,00,00,0,0,0,0,0,"CBW",               "AX = SIGNEXTEND(AL)",                   "Convert Signed Byte AL to Signed Word AX",
  345.   99,00,00,0,0,0,0,0,"CWD",               "DX:AX = SIGNEXTEND(AX)",                "Convert Signed Word AX to Signed Double Word DX:AX",
  346.   9A,00,00,0,0,0,0,0,"CALL FAR #ptr16_16","CALL FAR #ptr16_16",                    "CALL FAR #ptr16_16",
  347.   9B,00,00,0,0,0,0,0,"WAIT",              "WAITUNTILCOPROCESSORINACTIVE",          "Wait until Co-Processor is Inactive",
  348.   9C,00,00,0,0,0,0,0,"PUSHF",             "PUSH FLAGS",                            "Push the Flags Register onto the Stack",
  349.   9C,00,00,0,0,1,0,0,"PUSHFD",            "PUSH FLAGSD",                           "Push the Extended Flags Register onto the Stack",
  350.   9D,00,00,0,0,0,0,0,"POPF",              "POP FLAGS",                             "Pop the Flags Register from the Stack",
  351.   9D,00,00,0,0,0,0,0,"POPFD",             "POP FLAGSD",                            "Pop the Extended Flags Register from the Stack",
  352.   9E,00,00,0,0,0,0,0,"SAHF",              "FLAGS = AH",                            "Copy AH into the Flags Register",
  353.   9F,00,00,0,0,0,0,0,"LAHF",              "AH = FLAGS",                            "Copy the Flags Register into AH",
  354. ;;These are put right at the top of the program so that they get preference
  355. ;;over other opcodes which do the same but use more bytes
  356. ;;A0,00,00,0,0,0,0,0,"MOV AL,#moffs8",    ";AL = #moffs8",                          "Move #moffs8 into AL",
  357. ;;A1,00,00,0,0,0,0,0,"MOV AX,#moffs16",   ";AX = #moffs16",                         "Move #moffs16 into AX",
  358. ;;A1,00,00,0,0,1,0,0,"MOV EAX,#moffs32",  ";EAX = #moffs32",                        "Move #moffs32 into EAX",
  359. ;;A2,00,00,0,0,0,0,0,"MOV #moffs8,AL",    ";#moffs8 = AL",                          "Move AL into #moffs8",
  360. ;;A3,00,00,0,0,0,0,0,"MOV #moffs16,AX",   ";#moffs16 = AX",                         "Move AX into #moffs16",
  361. ;;A3,00,00,0,0,1,0,0,"MOV #moffs32,EAX",  ";#moffs32 = EAX",                        "Move EAX into #moffs32",
  362.   A4,00,00,0,0,0,0,0,"MOVSB",             "E1[DI++] = D1[SI++]",                   "Move Byte D1[SI] to E1[DI] and update SI & DI",
  363.   A4,00,00,0,1,0,0,0,"REP MOVSB",         "WHILE CX <> 0 : CX-- : E1[DI++] = D1[SI++] : WEND",             "Copy CX Bytes",
  364.   A5,00,00,0,0,0,0,0,"MOVSW",             "E2[DI++++] = D2[SI++++]",               "Move Word D2[SI] to E2[DI] and update SI & DI",
  365.   A5,00,00,0,0,1,0,0,"MOVSD",             "E4[DI++++++++] = D2[SI++++++++]",       "Move DWord D4[SI] to E4[DI] and update SI & DI",
  366.   A5,00,00,0,1,0,0,0,"REP MOVSW",         "WHILE CX <> 0 : CX-- : E2[DI++++] = D2[SI++++] : WEND",         "Copy CX Words",
  367.   A5,00,00,0,1,1,0,0,"REP MOVSD",         "WHILE CX <> 0 : CX-- : E4[DI++++++++] = D4[SI++++++++] : WEND", "Copy CX DWords",
  368.   A6,00,00,0,0,0,0,0,"CMPSB",             "COMPARE E1[DI++] WITH D1[SI++]",        "Compare Bytes E1[DI] with D1[SI] and update SI & DI",
  369.   A6,00,00,0,1,0,0,0,"REPE CMPSB",        "WHILE CX <> 0 : CX-- : IF E1[DI++] <> D1[SI++] THEN BREAK : WEND",                "Search for first Byte Mismatch",
  370.   A6,00,00,1,0,0,0,0,"REPNE CMPSB",       "WHILE CX <> 0 : CX-- : IF E1[DI++] = D1[SI++] THEN BREAK : WEND", "Search for First Byte Match",
  371.   A7,00,00,0,0,0,0,0,"CMPSW",             "COMPARE E2[DI++++] WITH D2[SI++++]",    "Compare Words E2[DI] with D2[SI] and update SI & DI",
  372.   A7,00,00,0,0,1,0,0,"CMPSD",             "COMPARE E4[DI++++++++] WITH D4[SI++++++++]","Compare DWords E4[DI] with D4[SI] and update SI & DI",
  373.   A7,00,00,0,1,0,0,0,"REPE CMPSW",        "WHILE CX <> 0 : CX-- : IF E2[DI++++] <> D2[SI++++] THEN BREAK : WEND",            "Search for first Word Mismatch",
  374.   A7,00,00,0,1,1,0,0,"REPE CMPSD",        "WHILE CX <> 0 : CX-- : IF E4[DI++++++++] <> D4[SI++++++++] THEN BREAK : WEND",    "Search for first DWord Mismatch",
  375.   A7,00,00,1,0,0,0,0,"REPNE CMPSW",       "WHILE CX <> 0 : CX-- : IF E2[DI++++] = D2[SI++++] THEN BREAK : WEND",           "Search for First Word Match",
  376.   A7,00,00,1,0,1,0,0,"REPNE CMPSD",       "WHILE CX <> 0 : CX-- : IF E4[DI++++++++] = D4[SI++++++++] THEN BREAK : WEND",   "Search for First DWord Match",
  377.   A8,00,00,0,0,0,0,0,"TEST AL,#imm8",     "TEST AL WITH #imm8",                    "TEST (AND) AL against #imm8",
  378.   A9,00,00,0,0,0,0,0,"TEST AX,#imm16",    "TEST AX WITH #imm16",                   "TEST (AND) AX against #imm16",
  379.   A9,00,00,0,0,1,0,0,"TEST EAX,#imm32",   "TEST EAX WITH #imm32",                  "TEST (AND) EAX against #imm32",
  380.   AA,00,00,0,0,0,0,0,"STOSB",             "E1[DI++] = AL",                         "Store AL in E1[DI] and update DI",
  381.   AA,00,00,0,1,0,0,0,"REP STOSB",         "WHILE CX <> 0 : CX-- : E1[DI++] = AL : WEND",                   "Fill with CX Bytes",
  382.   AB,00,00,0,1,0,0,0,"REP STOSW",         "WHILE CX <> 0 : CX-- : E2[DI++++] = AX : WEND",                 "Fill with CX Words",
  383.   AB,00,00,0,0,0,0,0,"STOSW",             "E2[DI++++] = AX",                       "Store AX in E2[DI] and update DI",
  384.   AB,00,00,0,0,1,0,0,"STOSD",             "E4[DI++++++++] = EAX",                  "Store EAX in E4[DI] and update DI",
  385.   AB,00,00,0,1,1,0,0,"REP STOSD",         "WHILE CX <> 0 : CX-- : E4[DI++++++++] = EAX : WEND",            "Fill with CX DWords",
  386.   AC,00,00,0,0,0,0,0,"LODSB",             "AL = D1[SI++]",                         "Load D1[SI] into AL and update SI",
  387.   AD,00,00,0,0,0,0,0,"LODSW",             "AX = D2[SI++++]",                       "Load D2[SI] into AX and update SI",
  388.   AD,00,00,0,0,1,0,0,"LODSD",             "EAX = D4[SI++++++++]",                  "Load D4[SI] into EAX and update SI",
  389.   AE,00,00,0,0,0,0,0,"SCASB",             "COMPARE E1[DI++] WITH AL",              "Compare E1[DI] with AL and update DI",
  390.   AE,00,00,0,1,0,0,0,"REPE SCASB",        "WHILE CX <> 0 : CX-- : IF E1[DI++] <> AL THEN BREAK : WEND",                      "Search for First Byte <> AL",
  391.   AE,00,00,1,0,0,0,0,"REPNE SCASB",       "WHILE CX <> 0 : CX-- : IF E1[DI++] = AL THEN BREAK : WEND",        "Search for the Byte AL",
  392.   AF,00,00,0,0,0,0,0,"SCASW",             "COMPARE E2[DI++++] WITH AX",            "Compare E2[DI] with AX and update DI",
  393.   AF,00,00,0,0,1,0,0,"SCASD",             "COMPARE E4[DI++++++++] WITH EAX",       "Compare E4[DI] with EAX and update DI",
  394.   AF,00,00,0,1,0,0,0,"REPE SCASW",        "WHILE CX <> 0 : CX-- : IF E2[DI++++] <> AX THEN BREAK : WEND",                    "Search for First Word <> AX",
  395.   AF,00,00,0,1,1,0,0,"REPE SCASD",        "WHILE CX <> 0 : CX-- : IF E4[DI++++++++] <> EAX THEN BREAK : WEND",               "Search for First DWord <> EAX",
  396.   AF,00,00,1,0,0,0,0,"REPNE SCASW",       "WHILE CX <> 0 : CX-- : IF E2[DI++++] = AX THEN BREAK : WEND",      "Search for the Word AX",
  397.   AF,00,00,1,0,1,0,0,"REPNE SCASD",       "WHILE CX <> 0 : CX-- : IF E4[DI++++++++] = EAX THEN BREAK : WEND", "Search for the DWord EAX",
  398.   B0,00,00,0,0,0,0,0,"MOV AL,#imm8",      ";AL = #imm8",                            "Move #imm8 into AL",
  399.   B1,00,00,0,0,0,0,0,"MOV CL,#imm8",      ";CL = #imm8",                            "Move #imm8 into CL",
  400.   B2,00,00,0,0,0,0,0,"MOV DL,#imm8",      ";DL = #imm8",                            "Move #imm8 into DL",
  401.   B3,00,00,0,0,0,0,0,"MOV BL,#imm8",      ";BL = #imm8",                            "Move #imm8 into BL",
  402.   B4,00,00,0,0,0,0,0,"MOV AH,#imm8",      ";AH = #imm8",                            "Move #imm8 into AH",
  403.   B5,00,00,0,0,0,0,0,"MOV CH,#imm8",      ";CH = #imm8",                            "Move #imm8 into CH",
  404.   B6,00,00,0,0,0,0,0,"MOV DH,#imm8",      ";DH = #imm8",                            "Move #imm8 into DH",
  405.   B7,00,00,0,0,0,0,0,"MOV BH,#imm8",      ";BH = #imm8",                            "Move #imm8 into BH",
  406.   B8,00,00,0,0,0,0,0,"MOV AX,#imm16",     ";AX = #imm16",                           "Move #imm16 into AX",
  407.   B8,00,00,0,0,1,0,0,"MOV EAX,#imm32",    ";EAX = #imm32",                          "Move #imm32 into EAX",
  408.   B9,00,00,0,0,0,0,0,"MOV CX,#imm16",     ";CX = #imm16",                           "Move #imm16 into CX",
  409.   B9,00,00,0,0,1,0,0,"MOV ECX,#imm32",    ";ECX = #imm32",                          "Move #imm32 into ECX",
  410.   BA,00,00,0,0,0,0,0,"MOV DX,#imm16",     ";DX = #imm16",                           "Move #imm16 into DX",
  411.   BA,00,00,0,0,1,0,0,"MOV EDX,#imm32",    ";EDX = #imm32",                          "Move #imm32 into EDX",
  412.   BB,00,00,0,0,0,0,0,"MOV BX,#imm16",     ";BX = #imm16",                           "Move #imm16 into BX",
  413.   BB,00,00,0,0,1,0,0,"MOV EBX,#imm32",    ";EBX = #imm32",                          "Move #imm32 into EBX",
  414.   BC,00,00,0,0,0,0,0,"MOV SP,#imm16",     ";SP = #imm16",                           "Move #imm16 into SP",
  415.   BC,00,00,0,0,1,0,0,"MOV ESP,#imm32",    ";ESP = #imm32",                          "Move #imm32 into ESP",
  416.   BD,00,00,0,0,0,0,0,"MOV BP,#imm16",     ";BP = #imm16",                           "Move #imm16 into BP",
  417.   BD,00,00,0,0,1,0,0,"MOV EBP,#imm32",    ";EBP = #imm32",                          "Move #imm32 into EBP",
  418.   BE,00,00,0,0,0,0,0,"MOV SI,#imm16",     ";SI = #imm16",                           "Move #imm16 into SI",
  419.   BE,00,00,0,0,1,0,0,"MOV ESI,#imm32",    ";ESI = #imm32",                          "Move #imm32 into ESI",
  420.   BF,00,00,0,0,0,0,0,"MOV DI,#imm16",     ";DI = #imm16",                           "Move #imm16 into DI",
  421.   BF,00,00,0,0,1,0,0,"MOV EDI,#imm32",    ";EDI = #imm32",                          "Move #imm32 into EDI",
  422.   C0,00,00,0,0,0,1,0,"ROL #rm8,#imm8",    ";ROL #rm8,#imm8",                        "Rotate #rm8 Left #imm8 times",
  423.   C0,00,08,0,0,0,1,0,"ROR #rm8,#imm8",    ";ROR #rm8,#imm8",                        "Rotate #rm8 Right #imm8 times",
  424.   C0,00,10,0,0,0,1,0,"RCL #rm8,#imm8",    ";RCL #rm8,#imm8",                        "Rotate with Carry #rm8 Left #imm8 times",
  425.   C0,00,18,0,0,0,1,0,"RCR #rm8,#imm8",    ";RCR #rm8,#imm8",                        "Rotate with Carry #rm8 Right #imm8 times",
  426.   C0,00,20,0,0,0,1,0,"SHL #rm8,#imm8",    ";SHL #rm8,#imm8",                        "Shift #rm8 Left #imm8 times (Multiply)",
  427.   C0,00,28,0,0,0,1,0,"SHR #rm8,#imm8",    ";SHR #rm8,#imm8",                        "Shift #rm8 Right #imm8 times (Unsigned divide)",
  428.   C0,00,38,0,0,0,1,0,"SAR #rm8,#imm8",    ";SAR #rm8,#imm8",                        "Shift #rm8 Right #imm8 times (Signed Divide)",
  429.   C1,00,00,0,0,0,1,0,"ROL #rm16,#imm8",   ";ROL #rm16,#imm8",                       "Rotate #rm16 Left #imm8 times",
  430.   C1,00,00,0,0,1,1,0,"ROL #rm32,#imm8",   ";ROL #rm32,#imm8",                       "Rotate #rm32 Left #imm8 times",
  431.   C1,00,08,0,0,0,1,0,"ROR #rm16,#imm8",   ";ROR #rm16,#imm8",                       "Rotate #rm16 Right #imm8 times",
  432.   C1,00,08,0,0,1,1,0,"ROR #rm32,#imm8",   ";ROR #rm32,#imm8",                       "Rotate #rm32 Right #imm8 times",
  433.   C1,00,10,0,0,0,1,0,"RCL #rm16,#imm8",   ";RCL #rm16,#imm8",                       "Rotate with Carry #rm16 Left #imm8 times",
  434.   C1,00,10,0,0,1,1,0,"RCL #rm32,#imm8",   ";RCL #rm32,#imm8",                       "Rotate with Carry #rm32 Left #imm8 times",
  435.   C1,00,18,0,0,0,1,0,"RCR #rm16,#imm8",   ";RCR #rm16,#imm8",                       "Rotate with Carry #rm16 Right #imm8 times",
  436.   C1,00,18,0,0,1,1,0,"RCR #rm32,#imm8",   ";RCR #rm32,#imm8",                       "Rotate with Carry #rm32 Right #imm8 times",
  437.   C1,00,20,0,0,0,1,0,"SHL #rm16,#imm8",   ";SHL #rm16,#imm8",                       "Shift #rm16 Left #imm8 times (Multiply)",
  438.   C1,00,20,0,0,1,1,0,"SHL #rm32,#imm8",   ";SHL #rm32,#imm8",                       "Shift #rm32 Left #imm8 times (Multiply)",
  439.   C1,00,28,0,0,0,1,0,"SHR #rm16,#imm8",   ";SHR #rm16,#imm8",                       "Shift #rm16 Right #imm8 times (Unsigned Divide)",
  440.   C1,00,28,0,0,1,1,0,"SHR #rm32,#imm8",   ";SHR #rm32,#imm8",                       "Shift #rm32 Right #imm8 times (Unsigned Divide)",
  441.   C1,00,38,0,0,0,1,0,"SAR #rm16,#imm8",   ";SAR #rm16,#imm8",                       "Shift #rm16 Right #imm8 times (Signed Divide)",
  442.   C1,00,38,0,0,1,1,0,"SAR #rm32,#imm8",   ";SAR #rm32,#imm8",                       "Shift #rm32 Right #imm8 times (Signed Divide)",
  443.   C2,00,00,0,0,0,0,0,"RET #imm16",        "RET AND POP #imm16 BYTES",           "Return and Remove #imm16 bytes from the Stack",
  444.   C3,00,00,0,0,0,0,0,"RET",               "RET",                                "Return",
  445.   C4,00,00,0,0,0,0,0,"LES #r16,#rm32",    "ES:#r16 = #rm32",                       "Load ES:#r16 with #rm32",
  446. ; C4,00,00,0,0,1,0,0,"LES #r32,#rm48",    "ES:#r32 = #rm48",                       "Load ES:#r32 with #rm48",
  447.   C5,00,00,0,0,0,0,0,"LDS #r16,#rm32",    "DS:#r16 = #rm32",                       "Load DS:#r16 with #rm32",
  448. ; C5,00,00,0,0,1,0,0,"LDS #r32,#rm48",    "DS:#r32 = #rm48",                       "Load DS:#r32 with #rm48",
  449.   C6,00,00,0,0,0,0,0,"MOV #rm8,#imm8",    ";#rm8 = #imm8",                          "Move #imm8 into #rm8",
  450.   C7,00,00,0,0,0,0,0,"MOV #rm16,#imm16",  ";#rm16 = #imm16",                        "Move #imm16 into #rm16",
  451.   C7,00,00,0,0,1,0,0,"MOV #rm32,#imm32",  ";#rm32 = #imm32",                        "Move #imm32 into #rm32",
  452.   C8,00,00,0,0,0,0,1,"ENTER #imm16,#imm8","MAKESTACKFRAME(#imm16,#imm8)",          "Make Stack Frame. Reserve #imm16 bytes for local variables",
  453.   C9,00,00,0,0,0,0,1,"LEAVE",             "RELEASESTACKFRAME",                     "Release Stack Frame",
  454.   CA,00,00,0,0,0,0,0,"RETF #imm16",       "RET FAR AND POP #imm16 BYTES",       "Return and Remove #imm16 bytes from the Stack",
  455.   CB,00,00,0,0,0,0,0,"RETF",              "RET FAR",                            "Return",
  456.   CC,00,00,0,0,0,0,0,"INT 3",             "INTERRUPT(3)",                          "Interrupt 3. Breakpoint",
  457.   CD,00,00,0,0,0,0,0,"INT #imm8",         "INTERRUPT(#imm8)",                      "Interrupt #imm8",
  458.   CE,00,00,0,0,0,0,0,"INTO",              "IF OVERFLOWFLAG THEN INTERRUPT(4)",     "Call Interrupt 4 if Overflow",
  459.   CF,00,00,0,0,0,0,0,"IRET",              "INTERRUPTRETURN",                       "Return from Interrupt",
  460. ; CF,00,00,0,0,1,0,0,"IRETD",             "IRETD",                                 "Return from Interrupt",
  461.   D0,00,00,0,0,0,1,0,"ROL #rm8,1",        ";ROL #rm8,1",                            "Rotate #rm8 Left",
  462.   D0,00,08,0,0,0,1,0,"ROR #rm8,1",        ";ROR #rm8,1",                            "Rotate #rm8 Right",
  463.   D0,00,10,0,0,0,1,0,"RCL #rm8,1",        ";RCL #rm8,1",                            "Rotate #rm8 Left with Carry",
  464.   D0,00,18,0,0,0,1,0,"RCR #rm8,1",        ";RCR #rm8,1",                            "Rotate #rm8 Right with Carry",
  465.   D0,00,20,0,0,0,1,0,"SHL #rm8,1",        ";#rm8 = #rm8 * 2",                       "Multiply #rm8 by 2",
  466.   D0,00,28,0,0,0,1,0,"SHR #rm8,1",        ";#rm8 = #rm8 ./. 2",                     "Unsigned Divide #rm8 by 2",
  467.   D0,00,30,0,0,0,1,1,"SHL #rm8,1",        ";#rm8 = #rm8 * 2",                       "Multiply #rm8 by 2",
  468.   D0,00,38,0,0,0,1,0,"SAR #rm8,1",        ";#rm8 = #rm8 / 2",                       "Signed Divide #rm8 by 2",
  469.   D1,00,00,0,0,0,1,0,"ROL #rm16,1",       ";ROL #rm16,1",                           "Rotate #rm16 Left",
  470.   D1,00,00,0,0,1,1,0,"ROL #rm32,1",       ";ROL #rm32,1",                           "Rotate #rm32 Left",
  471.   D1,00,08,0,0,0,1,0,"ROR #rm16,1",       ";ROR #rm16,1",                           "Rotate #rm16 Right",
  472.   D1,00,08,0,0,1,1,0,"ROR #rm32,1",       ";ROR #rm32,1",                           "Rotate #rm32 Right",
  473.   D1,00,10,0,0,0,1,0,"RCL #rm16,1",       ";RCL #rm16,1",                           "Rotate #rm16 Left with Carry",
  474.   D1,00,10,0,0,1,1,0,"RCL #rm32,1",       ";RCL #rm32,1",                           "Rotate #rm32 Left with Carry",
  475.   D1,00,18,0,0,0,1,0,"RCR #rm16,1",       ";RCR #rm16,1",                           "Rotate #rm16 Right with Carry",
  476.   D1,00,18,0,0,1,1,0,"RCR #rm32,1",       ";RCR #rm32,1",                           "Rotate #rm32 Right with Carry",
  477.   D1,00,20,0,0,0,1,0,"SHL #rm16,1",       ";#rm16 = #rm16 * 2",                     "Multiply #rm16 by 2",
  478.   D1,00,20,0,0,1,1,0,"SHL #rm32,1",       ";#rm32 = #rm32 * 2",                     "Multiply #rm32 by 2",
  479.   D1,00,28,0,0,0,1,0,"SHR #rm16,1",       ";#rm16 = #rm16 ./. 2",                   "Unsigned Divide #rm16 by 2",
  480.   D1,00,28,0,0,1,1,0,"SHR #rm32,1",       ";#rm32 = #rm32 ./. 2",                   "Unsigned Divide #rm32 by 2",
  481.   D1,00,30,0,0,0,1,1,"SHL #rm16,1",       ";#rm16 = #rm16 * 2",                     "Multiply #rm16 by 2",
  482.   D1,00,30,0,0,1,1,1,"SHL #rm32,1",       ";#rm32 = #rm32 * 2",                     "Multiply #rm32 by 2",
  483.   D1,00,38,0,0,0,1,0,"SAR #rm16,1",       ";#rm16 = #rm16 / 2",                     "Signed Divide #rm16 by 2",
  484.   D1,00,38,0,0,1,1,0,"SAR #rm32,1",       ";#rm32 = #rm32 / 2",                     "Signed Divide #rm32 by 2",
  485.   D2,00,00,0,0,0,1,0,"ROL #rm8,CL",       ";ROL #rm8,CL",                           "Rotate #rm8 Left CL times",
  486.   D2,00,08,0,0,0,1,0,"ROR #rm8,CL",       ";ROR #rm8,CL",                           "Rotate #rm8 Right CL times",
  487.   D2,00,10,0,0,0,1,0,"RCL #rm8,CL",       ";RCL #rm8,CL",                           "Rotate with Carry #rm8 Left CL times",
  488.   D2,00,18,0,0,0,1,0,"RCR #rm8,CL",       ";RCR #rm8,CL",                           "Rotate with Carry #rm8 Right CL times",
  489.   D2,00,20,0,0,0,1,0,"SHL #rm8,CL",       ";SHL #rm8,CL",                           "Multiply #rm8 by 2 CL times",
  490.   D2,00,28,0,0,0,1,0,"SHR #rm8,CL",       ";SHR #rm8,CL",                           "Unsigned Divide #rm8 by 2 CL times",
  491.   D2,00,30,0,0,0,1,1,"SHL #rm8,CL",       ";SHL #rm8,CL",                           "Multiply #rm8 by 2 CL times",
  492.   D2,00,38,0,0,0,1,0,"SAR #rm8,CL",       ";SAR #rm8,CL",                           "Signed Divide #rm8 by 2 CL times",
  493.   D3,00,00,0,0,0,1,0,"ROL #rm16,CL",      ";ROL #rm16,CL",                          "Rotate #rm16 Left CL times",
  494.   D3,00,00,0,0,1,1,0,"ROL #rm32,CL",      ";ROL #rm32,CL",                          "Rotate #rm32 Left CL times",
  495.   D3,00,08,0,0,0,1,0,"ROR #rm16,CL",      ";ROR #rm16,CL",                          "Rotate #rm16 Right CL times",
  496.   D3,00,08,0,0,1,1,0,"ROR #rm32,CL",      ";ROR #rm32,CL",                          "Rotate #rm32 Right CL times",
  497.   D3,00,10,0,0,0,1,0,"RCL #rm16,CL",      ";RCL #rm16,CL",                          "Rotate with Carry #rm16 Left CL times",
  498.   D3,00,10,0,0,1,1,0,"RCL #rm32,CL",      ";RCL #rm32,CL",                          "Rotate with Carry #rm32 Left CL times",
  499.   D3,00,18,0,0,0,1,0,"RCR #rm16,CL",      ";RCR #rm16,CL",                          "Rotate with Carry #rm16 Right CL times",
  500.   D3,00,18,0,0,1,1,0,"RCR #rm32,CL",      ";RCR #rm32,CL",                          "Rotate with Carry #rm32 Right CL times",
  501.   D3,00,20,0,0,0,1,0,"SHL #rm16,CL",      ";SHL #rm16,CL",                          "Shift #rm16 Left CL times (Multiply)",
  502.   D3,00,20,0,0,1,1,0,"SHL #rm32,CL",      ";SHL #rm32,CL",                          "Shift #rm32 Left CL times (Multiply)",
  503.   D3,00,28,0,0,0,1,0,"SHR #rm16,CL",      ";SHR #rm16,CL",                          "Shift #rm16 Right CL times (Unsigned Divide)",
  504.   D3,00,28,0,0,1,1,0,"SHR #rm32,CL",      ";SHR #rm32,CL",                          "Shift #rm32 Right CL times (Unsigned Divide)",
  505.   D3,00,30,0,0,0,1,1,"SHL #rm16,CL",      ";SHL #rm16,CL",                          "Shift #rm16 Left CL times (Multiply)",
  506.   D3,00,30,0,0,1,1,1,"SHL #rm32,CL",      ";SHL #rm32,CL",                          "Shift #rm32 Left CL times (Multiply)",
  507.   D3,00,38,0,0,0,1,0,"SAR #rm16,CL",      ";SAR #rm16,CL",                          "Shift #rm16 Right CL times (Signed Divide)",
  508.   D3,00,38,0,0,1,1,0,"SAR #rm32,CL",      ";SAR #rm32,CL",                          "Shift #rm32 Right CL times (Signed Divide)",
  509.   D4,0A,00,A,A,0,0,0,"AAM",               ";AAM",                                   "ASCII Adjust AX after Multiplication",
  510.   D5,0A,00,A,A,0,0,0,"AAD",               ";AAD",                                   "ASCII Adjust AX before Addition",
  511.   D7,00,00,0,0,0,0,0,"XLATB",             "AL = D1[BX+AL]",                        "Table Look-Up Translation",
  512. ; D8 to DF are for the coprocessor
  513.   D8,00,00,0,0,0,1,0,"FADD #rm32",        "ST[0] = ST[0] + #rm32",                 "ST[0] = ST[0] + #rm32",
  514.   D8,00,08,0,0,0,1,0,"FMUL #rm32",        "ST[0] = ST[0] * #rm32",                 "ST[0] = ST[0] * #rm32",
  515.   D8,00,10,0,0,0,1,0,"FCOM #rm32",        "FCOMPARE ST[0] WITH #rm32",             "Compare ST[0] with #rm32",
  516.   D8,00,18,0,0,0,1,0,"FCOMP #rm32",       "FCOMPARE ST[0] WITH #rm32 : FPOP",      "Compare ST[0] with #rm32 and Pop",
  517.   D8,00,20,0,0,0,1,0,"FSUB #rm32",        "ST[0] = ST[0] - #rm32",                 "ST[0] = ST[0] - #rm32",
  518.   D8,00,28,0,0,0,1,0,"FSUBR #rm32",       "ST[0] = #rm32 - ST[0]",                 "ST[0] = #rm32 - ST[0]",
  519.   D8,00,30,0,0,0,1,0,"FDIV #rm32",        "ST[0] = ST[0] / #rm32",                 "ST[0] = ST[0] / #rm32",
  520.   D8,00,38,0,0,0,1,0,"FDIVR #rm32",       "ST[0] = #rm32 / ST[0]",                 "ST[0] = #rm32 / ST[0]",
  521.   D8,00,C0,0,0,0,1,0,"FADD #STi",         "ST[0] = ST[0] + #STi",                  "ST[0] = ST[0] + #STi",
  522.   D8,00,C8,0,0,0,1,0,"FMUL #STi",         "ST[0] = ST[0] * #STi",                  "ST[0] = ST[0] * #STi",
  523.   D8,00,D0,0,0,0,1,0,"FCOM #STi",         "FCOMPARE ST[0] WITH #STi",              "Compare ST[0] with #STi",
  524.   D8,00,D8,0,0,0,1,0,"FCOMP #STi",        "FCOMPARE ST[0] WITH #STi : FPOP",       "Compare ST[0] with #STi and Pop",
  525.   D8,00,E0,0,0,0,1,0,"FSUB #STi",         "ST[0] = ST[0] - #STi",                  "ST[0] = ST[0] - #STi",
  526.   D8,00,E8,0,0,0,1,0,"FSUBR #STi",        "ST[0] = #STi - ST[0]",                  "ST[0] = #STi - ST[0]",
  527.   D8,00,F0,0,0,0,1,0,"FDIV #STi",         "ST[0] = ST[0] / #STi",                  "ST[0] = ST[0] / #STi",
  528.   D8,00,F8,0,0,0,1,0,"FDIVR #STi",        "ST[0] = #STi / ST[0]",                  "ST[0] = #STi / ST[0]",
  529.   D9,00,00,0,0,0,1,0,"FLD #rm32",         "FPUSH #rm32",                           "Push #rm32 onto Floating Point Stack",
  530.   D9,00,10,0,0,0,1,0,"FST #rm32",         "#rm32 = ST[0]",                         "Move ST[0] into #rm32",
  531.   D9,00,18,0,0,0,1,0,"FSTP #rm32",        "FPOP #rm32",                            "Move ST[0] into #rm32 and Pop",
  532.   D9,00,20,0,0,0,1,0,"FLDENV #rm16",      "FLDENV #rm16",                          "Load Environment from #rm16",
  533.   D9,00,28,0,0,0,1,0,"FLDCW #rm16",       "FCW = #rm16",                           "Move #rm16 into Control Word",
  534.   D9,00,30,0,0,0,1,0,"FSTENV #rm16",      "FSTENV #rm16",                          "Store Environment in #rm16",
  535.   D9,00,38,0,0,0,1,0,"FSTCW #rm16",       "#rm16 = FCW",                           "Store Control Word in #rm16",
  536.   D9,00,C0,0,0,0,1,0,"FLD #STi",          "FPUSH #STi",                            "Push #STi onto Floating Point Stack",
  537.   D9,00,C8,0,0,0,1,0,"FXCH #STi",         "FEXCHANGE ST[0] WITH #STi",             "Exchange ST[0] with #STi",
  538.   D9,D0,00,0,0,0,1,0,"FNOP",              "FNOP",                                  "No Operation. Filler Opcode which does nothing",
  539.   D9,E0,00,0,0,0,1,0,"FCHS",              "ST[0] = - ST[0]",                       "Change the Sign of ST[0]",
  540.   D9,E1,00,0,0,0,1,0,"FABS",              "ST[0] = ABS(ST[0])",                    "ST[0] = Absolute Value of ST[0]",
  541.   D9,E4,00,0,0,0,1,0,"FTST",              "FCOMPARE ST[0] WITH 0",                 "Test ST[0] if Equal to Zero",
  542.   D9,E5,00,0,0,0,1,0,"FXAM",              "FXAM",                                  "Examine ST[0] and set Flags",
  543.   D9,E8,00,0,0,0,1,0,"FLD1",              "FPUSH 1",                               "Push 1 onto Floating Point Stack",
  544.   D9,E9,00,0,0,0,1,0,"FLDL2T",            "FLDL2T",                                "Push LOG2(10) onto Floating Point Stack",
  545.   D9,EA,00,0,0,0,1,0,"FLDL2E",            "FLDL2E",                                "Push LOG2(E) onto Floating Point Stack",
  546.   D9,EB,00,0,0,0,1,0,"FLDPI",             "FPUSH PI",                              "Push PI onto Floating Point Stack",
  547.   D9,EC,00,0,0,0,1,0,"FLDLG2",            "FLDLG2",                                "Push LOG10(2) onto Floating Point Stack",
  548.   D9,ED,00,0,0,0,1,0,"FLDLN2",            "FLDLN2",                                "Push LN(2) onto Floating Point Stack",
  549.   D9,EE,00,0,0,0,1,0,"FLDZ",              "FPUSH 0",                               "Push 0 onto Floating Point Stack",
  550.   D9,F0,00,0,0,0,1,0,"F2XM1",             "ST[0] = 2 ^ ST[0] - 1",                 "ST[0] = 2 ^ ST[0] - 1",
  551.   D9,F1,00,0,0,0,1,0,"FYL2X",             "ST[1] = ST[1] * LOG2(ST[0]) : FPOP",    "ST[1] = ST[1] * LOG2(ST[0]) and Pop",
  552.   D9,F2,00,0,0,0,1,0,"FPTAN",             "ST[0] = TAN(ST[0]) : FPUSH 1",          "Calculate the Partial Tangent",
  553.   D9,F3,00,0,0,0,1,0,"FPATAN",            "ST[1] = ATAN(ST[1] / ST[0]) : FPOP",    "Calculate the Partial Arctangent",
  554.   D9,F4,00,0,0,0,1,0,"FXTRACT",           "FXTRACT",                               "Break ST[0] into the Significand and Exponent",
  555.   D9,F5,00,0,0,0,1,3,"FPREM1",            "FPREM1",                                "Calculate the Partial Remainder (IEEE)",
  556.   D9,F6,00,0,0,0,1,0,"FDECSTP",           "FPUSH",                                 "Push an unknown value onto the Floating Point Stack",
  557.   D9,F7,00,0,0,0,1,0,"FINCSTP",           "FPOP",                                  "Pop from the Floating Point Stack",
  558.   D9,F8,00,0,0,0,1,0,"FPREM",             "FPREM",                                 "Calculate the Partial Remainder",
  559.   D9,F9,00,0,0,0,1,0,"FYL2XP1",           "ST[1] = ST[1] * LOG2(ST[0] + 1) : FPOP","ST[1] = ST[1] * LOG2(ST[0] + 1) and Pop",
  560.   D9,FA,00,0,0,0,1,0,"FSQRT",             "ST[0] = SQRT(ST[0])",                   "ST[0] = SQRT(ST[0])",
  561.   D9,FB,00,0,0,0,1,3,"FSINCOS",           "FPUSH COS(ST[0]) : ST[1] = SIN(ST[1])", "Calculate the SINE and COSINE of ST[0]",
  562.   D9,FC,00,0,0,0,1,0,"FRNDINT",           "ST[0] = INT(ST[0])",                    "ST[0] = INT((ST[0])",
  563.   D9,FD,00,0,0,0,1,0,"FSCALE",            "ST[0] = ST[0] * 2 ^ INT(ST[1])",        "ST[0] = ST[0] * 2 ^ INT(ST[1])",
  564.   D9,FE,00,0,0,0,1,3,"FSIN",              "ST[0] = SIN(ST[0])",                    "ST[0] = SIN((ST[0])",
  565.   D9,FF,00,0,0,0,1,3,"FCOS",              "ST[0] = COS(ST[0])",                    "ST[0] = COS((ST[0])",
  566.   DA,00,00,0,0,0,1,0,"FIADD #rm32",       "ST[0] = ST[0] + FLOAT(#rm32)",          "ST[0] = ST[0] + #rm32",
  567.   DA,00,08,0,0,0,1,0,"FIMUL #rm32",       "ST[0] = ST[0] * FLOAT(#rm32)",          "ST[0] = ST[0] * #rm32",
  568.   DA,00,10,0,0,0,1,0,"FICOM #rm32",       "FCOMPARE ST[0] WITH FLOAT(#rm32)",      "Compare ST[0] with #rm32",
  569.   DA,00,18,0,0,0,1,0,"FICOMP #rm32",      "FCOMPARE ST[0] WITH FLOAT(#rm32) : FPOP","Compare ST[0] with #rm32 and Pop",
  570.   DA,00,20,0,0,0,1,0,"FISUB #rm32",       "ST[0] = ST[0] - FLOAT(#rm32)",          "ST[0] = ST[0] - #rm32",
  571.   DA,00,28,0,0,0,1,0,"FISUBR #rm32",      "ST[0] = FLOAT(#rm32) - ST[0]",          "ST[0] = #rm32 - ST[0]",
  572.   DA,00,30,0,0,0,1,0,"FIDIV #rm32",       "ST[0] = ST[0] / FLOAT(#rm32)",          "ST[0] = ST[0] / #rm32",
  573.   DA,00,38,0,0,0,1,0,"FIDIVR #rm32",      "ST[0] = FLOAT(#rm32) / ST[0]",          "ST[0] = #rm32 / ST[0]",
  574.   DA,E9,00,0,0,0,1,3,"FUCOMPP",           "FUCOMPARE ST[0] WITH ST[1] : FPOP : FPOP","Compare ST[0] with ST[1] and Pop Twice",
  575.   DB,00,00,0,0,0,1,0,"FILD #rm32",        "FPUSH FLOAT(#rm32)",                    "Push FLOAT(#rm32) onto Floating Point Stack",
  576.   DB,00,10,0,0,0,1,0,"FIST #rm32",        "#rm32 = INT(ST[0])",                    "Move INT(ST[0]) into #rm32",
  577.   DB,00,18,0,0,0,1,0,"FISTP #rm32",       "#rm32 = INT(ST[0]) : FPOP",             "Move INT(ST[0]) into #rm32 and Pop",
  578.   DB,00,28,0,0,0,1,0,"FLD #rm80",         "FPUSH #rm80",                           "Push #rm80 onto Floating Point Stack",
  579.   DB,00,38,0,0,0,1,0,"FSTP #rm80",        "FPOP #rm80",                            "Move ST[0] into #rm80 and Pop",
  580.   DB,E2,00,0,0,0,1,0,"FCLEX",             "FCLEX",                                 "Clear Exceptions",
  581.   DB,E3,00,0,0,0,1,0,"FINIT",             "FINIT",                                 "Initialise Floating Point Processor",
  582.   DC,00,00,0,0,0,1,0,"FADD #rm64",        "ST[0] = ST[0] + #rm64",                 "ST[0] = ST[0] + #rm64",
  583.   DC,00,08,0,0,0,1,0,"FMUL #rm64",        "ST[0] = ST[0] * #rm64",                 "ST[0] = ST[0] * #rm64",
  584.   DC,00,10,0,0,0,1,0,"FCOM #rm64",        "FCOMPARE ST[0] WITH #rm64",             "Compare ST[0] with #rm64",
  585.   DC,00,18,0,0,0,1,0,"FCOMP #rm64",       "FCOMPARE ST[0] WITH #rm64 : FPOP",      "Compare ST[0] with #rm64 and Pop",
  586.   DC,00,20,0,0,0,1,0,"FSUB #rm64",        "ST[0] = ST[0] - #rm64",                 "ST[0] = ST[0] - #rm64",
  587.   DC,00,28,0,0,0,1,0,"FSUBR #rm64",       "ST[0] = #rm64 - ST[0]",                 "ST[0] = #rm64 - ST[0]",
  588.   DC,00,30,0,0,0,1,0,"FDIV #rm64",        "ST[0] = ST[0] / #rm64",                 "ST[0] = ST[0] / #rm64",
  589.   DC,00,38,0,0,0,1,0,"FDIVR #rm64",       "ST[0] = #rm64 / ST[0]",                 "ST[0] = #rm64 / ST[0]",
  590.   DC,00,C0,0,0,0,1,0,"FADD #STi,ST[0]",   "#STi = #STi + ST[0]",                   "#STi = #STi + ST[0]",
  591.   DC,00,C8,0,0,0,1,0,"FMUL #STi,ST[0]",   "#STi = #STi * ST[0]",                   "#STi = #STi * ST[0]",
  592.   DC,00,D0,0,0,0,1,0,"FCOM #STi,ST[0]",   "FCOMPARE #STi WITH ST[0]",              "Compare #STi with ST[0]",
  593.   DC,00,D8,0,0,0,1,0,"FCOMP #STi,ST[0]",  "FCOMPARE #STi WITH ST[0] : FPOP",       "Compare #STi with ST[0] and Pop",
  594.   DC,00,E0,0,0,0,1,0,"FSUBR #STi,ST[0]",  "#STi = ST[0] - #STi",                   "#STi = ST[0] - #STi",
  595.   DC,00,E8,0,0,0,1,0,"FSUB #STi,ST[0]",   "#STi = #STi - ST[0]",                   "#STi = #STi - ST[0]",
  596.   DC,00,F0,0,0,0,1,0,"FDIVR #STi,ST[0]",  "#STi = ST[0] / #STi",                   "#STi = ST[0] / #STi",
  597.   DC,00,F8,0,0,0,1,0,"FDIV #STi,ST[0]",   "#STi = #STi / ST[0]",                   "#STi = #STi / ST[0]",
  598.   DD,00,00,0,0,0,1,0,"FLD #rm64",         "FPUSH #rm64",                           "Push #rm64 onto Floating Point Stack",
  599.   DD,00,10,0,0,0,1,0,"FST #rm64",         "#rm64 = ST[0]",                         "Move ST[0] into #rm64",
  600.   DD,00,18,0,0,0,1,0,"FSTP #rm64",        "FPOP #rm64",                            "Move ST[0] into #rm64 and Pop",
  601.   DD,00,20,0,0,0,1,0,"FRSTOR #rm32",      "FRSTOR #rm32",                          "Restore Floating Point Processor State",
  602.   DD,00,30,0,0,0,1,0,"FSAVE #rm32",       "FSAVE #rm32",                           "Save Floating Point Processor State",
  603.   DD,00,30,0,0,0,1,0,"FNSAVE #rm32",      "FNSAVE #rm32",                          "Save Floating Point Processor State",
  604.   DD,00,38,0,0,0,1,0,"FSTSW #rm16",       "#rm16 = FSW",                           "Store Status Word in #rm16",
  605.   DD,00,38,0,0,0,1,0,"FNSTSW #rm16",      "#rm16 = FSW",                           "Store Status Word in #rm16",
  606.   DD,00,C0,0,0,0,1,0,"FFREE #STi",        "FFREE #STi",                            "Mark #STi as Unused",
  607.   DD,00,D0,0,0,0,1,0,"FST #STi",          "#STi = ST[0]",                          "Move ST[0] into #STi",
  608.   DD,00,D8,0,0,0,1,0,"FSTP #STi",         "#STi = ST[0] : FPOP",                   "Move ST[0] into #STi and Pop",
  609.   DD,00,E0,0,0,0,1,3,"FUCOM #STi",        "FUCOMPARE ST[0] WITH #STi",             "Compare ST[0] with #STi",
  610.   DD,00,E8,0,0,0,1,3,"FUCOMP #STi",       "FUCOMPARE ST[0] WITH #STi : FPOP",      "Compare ST[0] with #STi and Pop",
  611.   DE,00,00,0,0,0,1,0,"FIADD #rm16",       "ST[0] = ST[0] + FLOAT(#rm16)",          "ST[0] = ST[0] + #rm16",
  612.   DE,00,08,0,0,0,1,0,"FIMUL #rm16",       "ST[0] = ST[0] * FLOAT(#rm16)",          "ST[0] = ST[0] * #rm16",
  613.   DE,00,10,0,0,0,1,0,"FICOM #rm16",       "FCOMPARE ST[0] WITH FLOAT(#rm16)",      "Compare ST[0] with #rm16",
  614.   DE,00,18,0,0,0,1,0,"FICOMP #rm16",      "FCOMPARE ST[0] WITH FLOAT(#rm16) : FPOP","Compare ST[0] with #rm16 and Pop",
  615.   DE,00,20,0,0,0,1,0,"FISUB #rm16",       "ST[0] = ST[0] - FLOAT(#rm16)",          "ST[0] = ST[0] - #rm16",
  616.   DE,00,28,0,0,0,1,0,"FISUBR #rm16",      "ST[0] = FLOAT(#rm16) - ST[0]",          "ST[0] = #rm16 - ST[0]",
  617.   DE,00,30,0,0,0,1,0,"FIDIV #rm16",       "ST[0] = ST[0] / FLOAT(#rm16)",          "ST[0] = ST[0] / #rm16",
  618.   DE,00,38,0,0,0,1,0,"FIDIVR #rm16",      "ST[0] = FLOAT(#rm16) / ST[0]",          "ST[0] = #rm16 / ST[0]",
  619.   DE,00,C0,0,0,0,1,0,"FADDP #STi,ST[0]",  "#STi = #STi + ST[0] : FPOP",            "#STi = #STi + ST[0] and Pop",
  620.   DE,00,C8,0,0,0,1,0,"FMULP #STi,ST[0]",  "#STi = #STi * ST[0] : FPOP",            "#STi = #STi * ST[0] and Pop",
  621.   DE,00,D8,0,0,0,1,0,"FCOMPP #STi,ST[0]", "FCOMPARE #STi WITH ST[0] : FPOP : FPOP","Compare #STi with ST[0] and Pop Twice",
  622.   DE,00,E0,0,0,0,1,0,"FSUBRP #STi,ST[0]", "#STi = ST[0] - #STi : FPOP",            "#STi = ST[0] - #STi and Pop",
  623.   DE,00,E8,0,0,0,1,0,"FSUBP #STi,ST[0]",  "#STi = #STi - ST[0] : FPOP",            "#STi = #STi - ST[0] and Pop",
  624.   DE,00,F0,0,0,0,1,0,"FDIVRP #STi,ST[0]", "#STi = ST[0] / #STi : FPOP",            "#STi = ST[0] / #STi and Pop",
  625.   DE,00,F8,0,0,0,1,0,"FDIVP #STi,ST[0]",  "#STi = #STi / ST[0] : FPOP",            "#STi = #STi / ST[0] and Pop",
  626.   DF,00,00,0,0,0,1,0,"FILD #rm16",        "FPUSH FLOAT(#rm16)",                    "Push FLOAT(#rm16) onto Floating Point Stack",
  627.   DF,00,10,0,0,0,1,0,"FIST #rm16",        "#rm16 = INT(ST[0])",                    "Move INT(ST[0]) into #rm16",
  628.   DF,00,18,0,0,0,1,0,"FISTP #rm16",       "#rm16 = INT(ST[0]) : FPOP",             "Move INT(ST[0]) into #rm16 and Pop",
  629.   DF,00,20,0,0,0,1,0,"FBLD #rm80",        "FPUSH BCDTOFLOAT(#rm80)",               "Convert #rm80 from BCD and Push onto Floating Point Stack",
  630.   DF,00,28,0,0,0,1,0,"FILD #rm64",        "FPUSH FLOAT(#rm64)",                    "Push FLOAT(#rm64) onto Floating Point Stack",
  631.   DF,00,30,0,0,0,1,0,"FBSTP #rm80",       "#rm80 = FLOATTOBCD(ST[0]) : FPOP",      "Convert ST[0] to BCD and Store in #rm80 and Pop",
  632.   DF,00,38,0,0,0,1,0,"FISTP #rm64",       "#rm64 = INT(ST[0]) : FPOP",             "Move INT(ST[0]) into #rm64 and Pop",
  633.   DF,E0,00,0,0,0,1,0,"FSTSW AX",          "AX = FSW",                              "Store Status Word in AX",
  634.   DF,E0,00,0,0,0,1,0,"FNSTSW AX",         "AX = FSW",                              "Store Status Word in AX",
  635.   E0,00,00,0,0,0,0,0,"LOOPNZ #rel8",      "CX-- : IF CX #<># 0 #AND# #NOT# ZEROFLAG THEN GOTO #rel8","Decrement CX and Jump to #rel8 if CX <> 0 AND NOT ZEROFLAG",
  636.   E0,00,00,0,0,0,0,0,"LOOPNE #rel8",      "LOOPNE #rel8",                          "Decrement CX and Jump to #rel8 if CX <> 0 AND NOT ZEROFLAG",
  637.   E1,00,00,0,0,0,0,0,"LOOPZ #rel8",       "CX-- : IF CX #<># 0 #AND# #NOTNOT# ZEROFLAG THEN GOTO #rel8","Decrement CX and Jump to #rel8 if CX <> 0 AND ZEROFLAG",
  638.   E1,00,00,0,0,0,0,0,"LOOPE #rel8",       "LOOPE #rel8",                           "Decrement CX and Jump to #rel8 if CX <> 0 AND ZEROFLAG",
  639.   E2,00,00,0,0,0,0,0,"LOOP #rel8",        "CX-- : IF CX #<># 0 THEN GOTO #rel8",   "Decrement CX and Jump to #rel8 if CX <> 0",
  640.   E3,00,00,0,0,0,0,0,"JCXZ #rel8",        "IF CX #=# 0 THEN GOTO #rel8",           "Jump to #rel8 if CX = 0",
  641.   E4,00,00,0,0,0,0,0,"IN AL,#imm8",       "AL = GETBYTEFROMPORT(#imm8)",           "Input Byte from Port #imm8 into AL",
  642.   E5,00,00,0,0,0,0,0,"IN AX,#imm8",       "AX = GETWORDFROMPORT(#imm8)",           "Input Word from Port #imm8 into AX",
  643.   E5,00,00,0,0,1,0,0,"IN EAX,#imm8",      "EAX = GETDWORDFROMPORT(#imm8)",         "Input Word from Port #imm8 into EAX",
  644.   E6,00,00,0,0,0,0,0,"OUT #imm8,AL",      "WRITEBYTETOPORT(#imm8,AL)",             "Output AL to Port #imm8",
  645.   E7,00,00,0,0,0,0,0,"OUT #imm8,AX",      "WRITEWORDTOPORT(#imm8,AX)",             "Output AX to Port #imm8",
  646.   E7,00,00,0,0,1,0,0,"OUT #imm8,EAX",     "WRITEDWORDTOPORT(#imm8,EAX)",           "Output EAX to Port #imm8",
  647.   E8,00,00,0,0,0,0,0,"CALL #rel16",       ";CALL #rel16",                           "Call Subroutine #rel16",
  648. ; E8,00,00,0,0,1,0,0,"CALL #rel32",       ";CALL #rel32",                           "Call Subroutine #rel32",
  649. ; JMP #rel8 must be before JMP #rel16 so that it has preference
  650.   EB,00,00,0,0,0,0,0,"JMP #rel8",         "GOTO #rel8",                            "Jump to #rel8",
  651.   E9,00,00,0,0,0,0,0,"JMP #rel16",        "GOTO #rel16",                           "Jump to #rel16",
  652. ; E9,00,00,0,0,1,0,0,"JMP #rel32",        "GOTO #rel32",                           "Jump to #rel32",
  653.   EA,00,00,0,0,0,0,0,"JMP FAR #ptr16_16", "GOTO FAR #ptr16_16",                    "Jump to FAR #ptr16_16",
  654. ; Following line is inserted above
  655. ; EB,00,00,0,0,0,0,0,"JMP #rel8",         "GOTO #rel8",                            "Jump to #rel8",
  656.   EC,00,00,0,0,0,0,0,"IN AL,DX",          "AL = GETBYTEFROMPORT(DX)",              "Input Byte from Port DX into AL",
  657.   ED,00,00,0,0,0,0,0,"IN AX,DX",          "AX = GETWORDFROMPORT(DX)",              "Input Word from Port DX into AX",
  658.   ED,00,00,0,0,1,0,0,"IN EAX,DX",         "EAX = GETDWORDFROMPORT(DX)",            "Input DWord from Port DX into EAX",
  659.   EE,00,00,0,0,0,0,0,"OUT DX,AL",         "WRITEBYTETOPORT(DX,AL)",                "Output AL to Port DX",
  660.   EF,00,00,0,0,0,0,0,"OUT DX,AX",         "WRITEWORDTOPORT(DX,AX)",                "Output AX to Port DX",
  661.   EF,00,00,0,0,1,0,0,"OUT DX,EAX",        "WRITEDWORDTOPORT(DX,EAX)",              "Output EAX to Port DX",
  662.   F0,00,00,0,0,0,0,0,"LOCK",              ";LOCK",                                  "Lock out other processors from using memory","LOCK",
  663.   F4,00,00,0,0,0,0,0,"HLT",               "HALT CPU",                              "Stop instruction execution and place CPU in HALT State",
  664.   F5,00,00,0,0,0,0,0,"CMC",               "CARRYFLAG = NOT CARRYFLAG",             "Compliment Carry Flag",
  665.   F6,00,00,0,0,0,1,0,"TEST #rm8,#imm8",   "TEST #rm8 WITH #imm8",                  "TEST (AND) #rm8 against #imm8",
  666.   F6,00,10,0,0,0,1,0,"NOT #rm8",          ";#rm8 = NOT #rm8",                       "Invert every bit in #rm8",
  667.   F6,00,18,0,0,0,1,0,"NEG #rm8",          ";#rm8 = - #rm8",                         "Negate #rm8",
  668.   F6,00,20,0,0,0,1,0,"MUL #rm8",          ";AX = AL .*. #rm8",                      "Unsigned Multiply AL by #rm8",
  669.   F6,00,28,0,0,0,1,0,"IMUL #rm8",         ";AX = AL * #rm8",                        "Signed Multiply AL by #rm8",
  670.   F6,00,30,0,0,0,1,0,"DIV #rm8",          "AL = AX ./. #rm8",                      "Unsigned Divide AX by #rm8. AH = Remainder",
  671.   F6,00,38,0,0,0,1,0,"IDIV #rm8",         "AL = AX / #rm8",                        "Signed Divide AX by #rm8. AH = Remainder",
  672.   F7,00,00,0,0,0,1,0,"TEST #rm16,#imm16", "TEST #rm16 WITH #imm16",                "TEST (AND) #rm16 against #imm16",
  673.   F7,00,00,0,0,0,1,0,"TEST #rm32,#imm32", "TEST #rm32 WITH #imm32",                "TEST (AND) #rm32 against #imm32",
  674.   F7,00,10,0,0,0,1,0,"NOT #rm16",         ";#rm16 = NOT #rm16",                     "Invert every bit in #rm16",
  675.   F7,00,10,0,0,1,1,0,"NOT #rm32",         ";#rm32 = NOT #rm32",                     "Invert every bit in #rm32",
  676.   F7,00,18,0,0,0,1,0,"NEG #rm16",         ";#rm16 = - #rm16",                       "Negate #rm16",
  677.   F7,00,18,0,0,1,1,0,"NEG #rm32",         ";#rm32 = - #rm32",                       "Negate #rm32",
  678.   F7,00,20,0,0,0,1,0,"MUL #rm16",         "DX:AX = AX .*. #rm16",                  "Unsigned Multiply AX by #rm16",
  679.   F7,00,20,0,0,1,1,0,"MUL #rm32",         "EDX:EAX = EAX .*. #rm32",               "Unsigned Multiply EAX by #rm32",
  680.   F7,00,28,0,0,0,1,0,"IMUL #rm16",        "DX:AX = AX * #rm16",                    "Signed Multiply AX by #rm16",
  681.   F7,00,28,0,0,1,1,0,"IMUL #rm32",        "EDX:EAX = EAX * #rm32",                 "Signed Multiply EAX by #rm32",
  682.   F7,00,30,0,0,0,1,0,"DIV #rm16",         "AX = DX:AX ./. #rm16",                  "Unsigned Divide DX:AX by #rm16. DX = Remainder",
  683.   F7,00,30,0,0,1,1,0,"DIV #rm32",         "EAX = EDX:EAX ./. #rm32",               "Unsigned Divide EDX:EAX by #rm32. EDX = Remainder",
  684.   F7,00,38,0,0,0,1,0,"IDIV #rm16",        "AX = DX:AX / #rm16",                    "Signed Divide DX:AX by #rm16. DX = Remainder",
  685.   F7,00,38,0,0,1,1,0,"IDIV #rm32",        "EAX = EDX:EAX / #rm32",                 "Signed Divide EDX:EAX by #rm32. EDX = Remainder",
  686.   F8,00,00,0,0,0,0,0,"CLC",               "CARRYFLAG = 0",                         "Clear Carry Flag",
  687.   F9,00,00,0,0,0,0,0,"STC",               "CARRYFLAG = 1",                         "Set Carry Flag",
  688.   FA,00,00,0,0,0,0,0,"CLI",               "DISABLEINTERRUPTS",                     "Clear Interrupt Flag",
  689.   FB,00,00,0,0,0,0,0,"STI",               "ENABLEINTERRUPTS",                      "Set Interrupt Flag",
  690.   FC,00,00,0,0,0,0,0,"CLD",               "DIRECTIONFLAG = UP",                    "Clear Direction Flag",
  691.   FD,00,00,0,0,0,0,0,"STD",               "DIRECTIONFLAG = DOWN",                  "Set Direction Flag",
  692.   FE,00,00,0,0,0,1,0,"INC #rm8",          "#rm8++",                                "Increment #rm8",
  693.   FE,00,08,0,0,0,1,0,"DEC #rm8",          "#rm8--",                                "Decrement #rm8",
  694.   FF,00,00,0,0,0,1,0,"INC #rm16",         "#rm16++",                               "Increment #rm16",
  695.   FF,00,00,0,0,1,1,0,"INC #rm32",         "#rm32++",                               "Increment #rm32",
  696.   FF,00,08,0,0,0,1,0,"DEC #rm16",         "#rm16--",                               "Decrement #rm16",
  697.   FF,00,08,0,0,1,1,0,"DEC #rm32",         "#rm32--",                               "Decrement #rm32",
  698.   FF,00,10,0,0,0,1,0,"CALL #rm16",        ";CALL #rm16",                            "Call #rm16",
  699. ; FF,00,10,0,0,1,1,0,"CALL #rm32",        ";CALL #rm32",                            "Call #rm32",
  700.   FF,00,18,0,0,0,1,0,"CALL FAR #rm32",    ";CALL FAR #rm32",                        "Call FAR #rm32",
  701. ; FF,00,18,0,0,1,1,0,"CALL FAR #m16_32",  ";CALL FAR #m16_32",                      "Call FAR #m16_32",
  702.   FF,00,20,0,0,0,1,0,"JMP #rm32",         "GOTO #rm32",                            "Jump to #rm32",
  703. ; FF,00,20,0,0,1,1,0,"JMP #m16_32",       "GOTO #m16_32",                          "Jump to #m16_32",
  704.   FF,00,28,0,0,0,1,0,"JMP FAR #rm32",     "GOTO FAR #rm32",                        "Jump to #rm32",
  705. ; FF,00,28,0,0,1,1,0,"JMP FAR #m16_32",   "GOTO FAR #m16_32",                      "Jump to #m16_32",
  706.   FF,00,30,0,0,0,1,0,"PUSH #rm16",        ";PUSH #rm16",                            "Push #rm16 onto the Stack",
  707.   FF,00,30,0,0,1,1,0,"PUSH #rm32",        ";PUSH #rm32",                            "Push #rm32 onto the Stack",
  708. ;
  709. ; These opcodes were introduced for the 286, 386 and 486
  710.   0F,00,00,0,0,0,1,2,"SLDT #rm16",        ";SLDT #rm16",                            "Store Local Descriptor Register",
  711.   0F,00,08,0,0,0,1,2,"STR #rm16",         ";STR #rm16",                             "Store Task Register",
  712.   0F,00,10,0,0,0,1,2,"LLDT #rm16",        ";LLDT #rm16",                            "Load Local Descriptor Table Register",
  713.   0F,00,18,0,0,0,1,2,"LTR #rm16",         ";LTR #rm16",                             "Load Task Register",
  714.   0F,00,20,0,0,0,1,2,"VERR #rm16",        ";VERR #rm16",                            "Verify a Segment for Reading",
  715.   0F,00,28,0,0,0,1,2,"VERW #rm16",        ";VERW #rm16",                            "Verify a Segment for Writing",
  716.   0F,01,00,0,0,0,1,2,"SGDT #rm16",        ";SGDT #rm16",                            "Store Global Descriptor Table",
  717.   0F,01,08,0,0,0,1,2,"SIDT #rm16",        ";SIDT #rm16",                            "Store Interrupt Descriptor Table",
  718.   0F,01,10,0,0,0,1,2,"LGDT #rm16",        ";LGDT #rm16",                            "Load Global Descriptor Table",
  719.   0F,01,18,0,0,0,1,2,"LIDT #rm16",        ";LIDT #rm16",                            "Load Interrupt Descriptor Table",
  720.   0F,01,20,0,0,0,1,2,"SMSW #rm16",        ";SMSW #rm16",                            "Store Machine Status Word",
  721.   0F,01,28,0,0,0,1,4,"INVLPG #rm16",      ";INVLPG #rm16",                          "Invalidate TLB Entry",
  722.   0F,01,30,0,0,0,1,2,"LMSW #rm16",        ";LMSW #rm16",                            "Load Machine Status Word",
  723.   0F,02,00,0,0,0,0,2,"LAR #r16,#rm16",    ";LAR #r16,#rm16",                        "Load Access Rights",
  724.   0F,03,00,0,0,0,0,2,"LSL #r16,#rm16",    ";LSL #r16,#rm16",                        "Load Segment Limit",
  725.   0F,06,00,0,0,0,0,2,"CLTS",              ";CLTS",                                  "Clear Task Switched Bit",
  726.   0F,08,00,0,0,0,0,4,"INVD",              ";INVD",                                  "Invalidate Cache",
  727.   0F,09,00,0,0,0,0,4,"WBINVD",            ";WBINVD",                                "Write Back and Invalidate Cache",
  728.   0F,20,00,0,0,0,0,2,"MOV #r32,#creg",    "#r32 = #creg",                          "Move #creg into #r32",
  729.   0F,21,00,0,0,0,0,2,"MOV #r32,#dreg",    "#r32 = #dreg",                          "Move #dreg into #r32",
  730.   0F,22,00,0,0,0,0,2,"MOV #creg,#r32",    "#creg = #r32",                          "Move #r32 into #creg",
  731.   0F,23,00,0,0,0,0,2,"MOV #dreg,#r32",    "#dreg = #r32",                          "Move #r32 into #dreg",
  732.   0F,24,00,0,0,0,0,2,"MOV #r32,#treg",    "#r32 = #treg",                          "Move #treg into #r32",
  733.   0F,26,00,0,0,0,0,2,"MOV #treg,#r32",    "#treg = #r32",                          "Move #r32 into #treg",
  734.   0F,BA,20,0,0,0,1,3,"BT #rm16,#imm8",    "BT #rm16,#imm8",                        "Carry Flag = Bit #imm8 of #rm16",
  735.   0F,BA,20,0,0,1,1,3,"BT #rm32,#imm8",    "BT #rm32,#imm8",                        "Carry Flag = Bit #imm8 of #rm32",
  736.   0F,BA,28,0,0,0,1,3,"BTS #rm16,#imm8",   "BTS #rm16,#imm8",                       "Carry Flag = Bit #imm8 of #rm16. Bit #imm8 of #rm16 = 1",
  737.   0F,BA,28,0,0,1,1,3,"BTS #rm32,#imm8",   "BTS #rm32,#imm8",                       "Carry Flag = Bit #imm8 of #rm32. Bit #imm8 of #rm32 = 1",
  738.   0F,BA,30,0,0,0,1,3,"BTR #rm16,#imm8",   "BTR #rm16,#imm8",                       "Carry Flag = Bit #imm8 of #rm16. Bit #imm8 of #rm16 = 0",
  739.   0F,BA,30,0,0,1,1,3,"BTR #rm32,#imm8",   "BTR #rm32,#imm8",                       "Carry Flag = Bit #imm8 of #rm32. Bit #imm8 of #rm32 = 0",
  740.   0F,BA,38,0,0,0,1,3,"BTC #rm16,#imm8",   "BTC #rm16,#imm8",                       "Carry Flag = Bit #imm8 of #rm16. Compliment Bit #imm8 of #rm16",
  741.   0F,BA,38,0,0,1,1,3,"BTC #rm32,#imm8",   "BTC #rm32,#imm8",                       "Carry Flag = Bit #imm8 of #rm32. Compliment Bit #imm8 of #rm32",
  742.   0F,80,00,0,0,0,0,3,"JO #rel16",         ";IF #NOTNOT# OVERFLOWFLAG THEN GOTO #rel16","Jump to #rel16 if Overflow",
  743.   0F,80,00,0,0,1,0,3,"JO #rel32",         ";IF #NOTNOT# OVERFLOWFLAG THEN GOTO #rel32","Jump to #rel32 if Overflow",
  744.   0F,81,00,0,0,0,0,3,"JNO #rel16",        ";IF #NOT# OVERFLOWFLAG THEN GOTO #rel16","Jump to #rel16 if No Overflow",
  745.   0F,81,00,0,0,1,0,3,"JNO #rel32",        ";IF #NOT# OVERFLOWFLAG THEN GOTO #rel32","Jump to #rel32 if No Overflow",
  746.   0F,82,00,0,0,0,0,3,"JC #rel16",         ";IF #NOTNOT# CARRYFLAG THEN GOTO #rel16","Jump to #rel16 if Carry Flag",
  747.   0F,82,00,0,0,0,0,3,"JB #rel16",         ";JB #rel16",                             "Jump to #rel16 if Below (Unsigned)",
  748.   0F,82,00,0,0,0,0,3,"JNAE #rel16",       ";JNAE #rel16",                           "Jump to #rel16 if Not Above or Equal (Unsigned)",
  749.   0F,82,00,0,0,1,0,3,"JC #rel32",         ";IF #NOTNOT# CARRYFLAG THEN GOTO #rel32","Jump to #rel32 if Carry Flag",
  750.   0F,82,00,0,0,1,0,3,"JB #rel32",         ";JB #rel32",                             "Jump to #rel32 if Below (Unsigned)",
  751.   0F,82,00,0,0,1,0,3,"JNAE #rel32",       ";JNAE #rel32",                           "Jump to #rel32 if Not Above or Equal (Unsigned)",
  752.   0F,83,00,0,0,0,0,3,"JNC #rel16",        ";IF #NOT# CARRYFLAG THEN GOTO #rel16",   "Jump to #rel16 if Not Carry Flag",
  753.   0F,83,00,0,0,0,0,3,"JAE #rel16",        ";JAE #rel16",                            "Jump to #rel16 if Above or Equal (Unsigned)",
  754.   0F,83,00,0,0,0,0,3,"JNB #rel16",        ";JNB #rel16",                            "Jump to #rel16 if Not Below (Unsigned)",
  755.   0F,83,00,0,0,1,0,3,"JNC #rel32",        ";IF #NOT# CARRYFLAG THEN GOTO #rel32",   "Jump to #rel32 if Not Carry Flag",
  756.   0F,83,00,0,0,1,0,3,"JAE #rel32",        ";JAE #rel32",                            "Jump to #rel32 if Above or Equal (Unsigned)",
  757.   0F,83,00,0,0,1,0,3,"JNB #rel32",        ";JNB #rel32",                            "Jump to #rel32 if Not Below (Unsigned)",
  758.   0F,84,00,0,0,0,0,3,"JZ #rel16",         ";IF #NOTNOT# ZEROFLAG THEN GOTO #rel16", "Jump to #rel16 if Zero Flag",
  759.   0F,84,00,0,0,0,0,3,"JE #rel16",         ";JE #rel16",                             "Jump to #rel16 if Equal",
  760.   0F,84,00,0,0,1,0,3,"JZ #rel32",         ";IF #NOTNOT# ZEROFLAG THEN GOTO #rel32", "Jump to #rel32 if Zero Flag",
  761.   0F,84,00,0,0,1,0,3,"JE #rel32",         ";JE #rel32",                             "Jump to #rel32 if Equal",
  762.   0F,85,00,0,0,0,0,3,"JNZ #rel16",        ";IF #NOT# ZEROFLAG THEN GOTO #rel16",    "Jump to #rel16 if Not Zero Flag",
  763.   0F,85,00,0,0,0,0,3,"JNE #rel16",        ";JNE #rel16",                            "Jump to #rel16 if Not Equal",
  764.   0F,85,00,0,0,1,0,3,"JNZ #rel32",        ";IF #NOT# ZEROFLAG THEN GOTO #rel32",    "Jump to #rel32 if Not Zero Flag",
  765.   0F,85,00,0,0,1,0,3,"JNE #rel32",        ";JNE #rel32",                            "Jump to #rel32 if Not Equal",
  766.   0F,86,00,0,0,0,0,3,"JBE #rel16",        ";JBE #rel16",                            "Jump to #rel16 if Below Or Equal (Unsigned)",
  767.   0F,86,00,0,0,0,0,3,"JNA #rel16",        ";JNA #rel16",                            "Jump to #rel16 if Not Above (Unsigned)",
  768.   0F,86,00,0,0,1,0,3,"JBE #rel32",        ";JBE #rel32",                            "Jump to #rel32 if Below Or Equal (Unsigned)",
  769.   0F,86,00,0,0,1,0,3,"JNA #rel32",        ";JNA #rel32",                            "Jump to #rel32 if Not Above (Unsigned)",
  770.   0F,87,00,0,0,0,0,3,"JA #rel16",         ";JA #rel16",                             "Jump to #rel16 if Above (Unsigned)",
  771.   0F,87,00,0,0,0,0,3,"JNBE #rel16",       ";JNBE #rel16",                           "Jump to #rel16 if Not Below or Equal (Unsigned)",
  772.   0F,87,00,0,0,1,0,3,"JA #rel32",         ";JA #rel32",                             "Jump to #rel32 if Above (Unsigned)",
  773.   0F,87,00,0,0,1,0,3,"JNBE #rel32",       ";JNBE #rel32",                           "Jump to #rel32 if Not Below or Equal (Unsigned)",
  774.   0F,88,00,0,0,0,0,3,"JS #rel16",         ";IF #NOTNOT# SIGNFLAG THEN GOTO #rel16", "Jump to #rel16 if Sign",
  775.   0F,88,00,0,0,1,0,3,"JS #rel32",         ";IF #NOTNOT# SIGNFLAG THEN GOTO #rel32", "Jump to #rel32 if Sign",
  776.   0F,89,00,0,0,0,0,3,"JNS #rel16",        ";IF #NOT# SIGNFLAG THEN GOTO #rel16",    "Jump to #rel16 if Not Sign",
  777.   0F,89,00,0,0,1,0,3,"JNS #rel32",        ";IF #NOT# SIGNFLAG THEN GOTO #rel32",    "Jump to #rel32 if Not Sign",
  778.   0F,8A,00,0,0,0,0,3,"JP #rel16",         ";IF #NOTNOT# PARITY THEN GOTO #rel16",   "Jump to #rel16 if Parity Flag",
  779.   0F,8A,00,0,0,0,0,3,"JPE #rel16",        ";JPE #rel16",                            "Jump to #rel16 if Parity Even",
  780.   0F,8A,00,0,0,1,0,3,"JP #rel32",         ";IF #NOTNOT# PARITY THEN GOTO #rel32",   "Jump to #rel32 if Parity Flag",
  781.   0F,8A,00,0,0,1,0,3,"JPE #rel32",        ";JPE #rel32",                            "Jump to #rel32 if Parity Even",
  782.   0F,8B,00,0,0,0,0,3,"JNP #rel16",        ";IF #NOT# PARITY THEN GOTO #rel16",      "Jump to #rel16 if Not Parity Flag",
  783.   0F,8B,00,0,0,0,0,3,"JPO #rel16",        ";JPO #rel16",                            "Jump to #rel16 if Parity Odd",
  784.   0F,8B,00,0,0,1,0,3,"JNP #rel32",        ";IF #NOT# PARITY THEN GOTO #rel32",      "Jump to #rel32 if Not Parity Flag",
  785.   0F,8B,00,0,0,1,0,3,"JPO #rel32",        ";JPO #rel32",                            "Jump to #rel32 if Parity Odd",
  786.   0F,8C,00,0,0,0,0,3,"JL #rel16",         ";JL #rel16",                             "Jump to #rel16 if Less",
  787.   0F,8C,00,0,0,0,0,3,"JNGE #rel16",       ";JNGE #rel16",                           "Jump to #rel16 if Not Greater than or Equal",
  788.   0F,8C,00,0,0,1,0,3,"JL #rel32",         ";JL #rel32",                             "Jump to #rel32 if Less",
  789.   0F,8C,00,0,0,1,0,3,"JNGE #rel32",       ";JNGE #rel32",                           "Jump to #rel32 if Not Greater than or Equal",
  790.   0F,8D,00,0,0,0,0,3,"JGE #rel16",        ";JGE #rel16",                            "Jump to #rel16 if Greater Than Or Equal",
  791.   0F,8D,00,0,0,0,0,3,"JNL #rel16",        ";JNL #rel16",                            "Jump to #rel16 if Not Less",
  792.   0F,8D,00,0,0,1,0,3,"JGE #rel32",        ";JGE #rel32",                            "Jump to #rel32 if Greater Than Or Equal",
  793.   0F,8D,00,0,0,1,0,3,"JNL #rel32",        ";JNL #rel32",                            "Jump to #rel32 if Not Less",
  794.   0F,8E,00,0,0,0,0,3,"JLE #rel16",        ";JLE #rel16",                            "Jump to #rel16 if Less Or Equal",
  795.   0F,8E,00,0,0,0,0,3,"JNG #rel16",        ";JNG #rel16",                            "Jump to #rel16 if Not Greater Than",
  796.   0F,8E,00,0,0,1,0,3,"JLE #rel32",        ";JLE #rel32",                            "Jump to #rel32 if Less Or Equal",
  797.   0F,8E,00,0,0,1,0,3,"JNG #rel32",        ";JNG #rel32",                            "Jump to #rel32 if Not Greater Than",
  798.   0F,8F,00,0,0,0,0,3,"JG #rel16",         ";JG #rel16",                             "Jump to #rel16 if Greater",
  799.   0F,8F,00,0,0,0,0,3,"JNLE #rel16",       ";JNLE #rel16",                           "Jump to #rel16 if Not Less Than or Equal",
  800.   0F,8F,00,0,0,1,0,3,"JG #rel32",         ";JG #rel32",                             "Jump to #rel32 if Greater",
  801.   0F,8F,00,0,0,1,0,3,"JNLE #rel32",       ";JNLE #rel32",                           "Jump to #rel32 if Not Less Than or Equal",
  802.   0F,90,00,0,0,0,0,3,"SETO #rm8",         "IF #NOTNOT# OVERFLOWFLAG THEN #rm8 = 1 ELSE #rm8 = 0","If Overflow Then #rm8 = 1 else #rm8 = 0",
  803.   0F,91,00,0,0,0,0,3,"SETNO #rm8",        "IF #NOT# OVERFLOWFLAG THEN #rm8 = 1 ELSE #rm8 = 0",   "If No Overflow Then #rm8 = 1 else #rm8 = 0",
  804.   0F,92,00,0,0,0,0,3,"SETC #rm8",         "IF #NOTNOT# CARRYFLAG THEN #rm8 = 1 ELSE #rm8 = 0",   "If Carry Flag Then #rm8 = 1 else #rm8 = 0",
  805.   0F,92,00,0,0,0,0,3,"SETB #rm8",         ";SETB #rm8",                                           "If Below (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  806.   0F,92,00,0,0,0,0,3,"SETNAE #rm8",       ";SETNAE #rm8",                                         "If Not Above or Equal (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  807.   0F,93,00,0,0,0,0,3,"SETNC #rm8",        "IF #NOT# CARRYFLAG THEN #rm8 = 1 ELSE #rm8 = 0",      "If Not Carry Flag Then #rm8 = 1 else #rm8 = 0",
  808.   0F,93,00,0,0,0,0,3,"SETAE #rm8",        ";SETAE #rm8",                                          "If Above or Equal (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  809.   0F,93,00,0,0,0,0,3,"SETNB #rm8",        ";SETNB #rm8",                                          "If Not Below (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  810.   0F,94,00,0,0,0,0,3,"SETZ #rm8",         "IF #NOTNOT# ZEROFLAG THEN #rm8 = 1 ELSE #rm8 = 0",    "If Zero Flag Then #rm8 = 1 else #rm8 = 0",
  811.   0F,94,00,0,0,0,0,3,"SETE #rm8",         ";SETE #rm8",                                           "If Equal Then #rm8 = 1 else #rm8 = 0",
  812.   0F,95,00,0,0,0,0,3,"SETNZ #rm8",        "IF #NOT# ZEROFLAG THEN #rm8 = 1 ELSE #rm8 = 0",       "If Not Zero Flag Then #rm8 = 1 else #rm8 = 0",
  813.   0F,95,00,0,0,0,0,3,"SETNE #rm8",        ";SETNE #rm8",                                          "If Not Equal Then #rm8 = 1 else #rm8 = 0",
  814.   0F,96,00,0,0,0,0,3,"SETBE #rm8",        ";SETBE #rm8",                                          "If Below Or Equal (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  815.   0F,96,00,0,0,0,0,3,"SETNA #rm8",        ";SETNA #rm8",                                          "If Not Above (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  816.   0F,97,00,0,0,0,0,3,"SETA #rm8",         ";SETA #rm8",                                           "If Above (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  817.   0F,97,00,0,0,0,0,3,"SETNBE #rm8",       ";SETNBE #rm8",                                         "If Not Below or Equal (Unsigned) Then #rm8 = 1 else #rm8 = 0",
  818.   0F,98,00,0,0,0,0,3,"SETS #rm8",         "IF #NOTNOT# SIGNFLAG THEN #rm8 = 1 ELSE #rm8 = 0",    "If Sign Then #rm8 = 1 else #rm8 = 0",
  819.   0F,99,00,0,0,0,0,3,"SETNS #rm8",        "IF #NOT# SIGNFLAG THEN #rm8 = 1 ELSE #rm8 = 0",       "If Not Sign Then #rm8 = 1 else #rm8 = 0",
  820.   0F,9A,00,0,0,0,0,3,"SETP #rm8",         "IF #NOTNOT# PARITY THEN #rm8 = 1 ELSE #rm8 = 0",      "If Parity Flag Then #rm8 = 1 else #rm8 = 0",
  821.   0F,9A,00,0,0,0,0,3,"SETPE #rm8",        ";SETPE #rm8",                                          "If Parity Even Then #rm8 = 1 else #rm8 = 0",
  822.   0F,9B,00,0,0,0,0,3,"SETNP #rm8",        "IF #NOT# PARITY THEN #rm8 = 1 ELSE #rm8 = 0",         "If Not Parity Flag Then #rm8 = 1 else #rm8 = 0",
  823.   0F,9B,00,0,0,0,0,3,"SETPO #rm8",        ";SETPO #rm8",                                          "If Parity Odd Then #rm8 = 1 else #rm8 = 0",
  824.   0F,9C,00,0,0,0,0,3,"SETL #rm8",         ";SETL #rm8",                                           "If Less Then #rm8 = 1 else #rm8 = 0",
  825.   0F,9C,00,0,0,0,0,3,"SETNGE #rm8",       ";SETNGE #rm8",                                         "If Not Greater than or Equal Then #rm8 = 1 else #rm8 = 0",
  826.   0F,9D,00,0,0,0,0,3,"SETGE #rm8",        ";SETGE #rm8",                                          "If Greater Than Or Equal Then #rm8 = 1 else #rm8 = 0",
  827.   0F,9D,00,0,0,0,0,3,"SETNL #rm8",        ";SETNL #rm8",                                          "If Not Less Then #rm8 = 1 else #rm8 = 0",
  828.   0F,9E,00,0,0,0,0,3,"SETLE #rm8",        ";SETLE #rm8",                                          "If Less Or Equal Then #rm8 = 1 else #rm8 = 0",
  829.   0F,9E,00,0,0,0,0,3,"SETNG #rm8",        ";SETNG #rm8",                                          "If Not Greater Than Then #rm8 = 1 else #rm8 = 0",
  830.   0F,9F,00,0,0,0,0,3,"SETG #rm8",         ";SETG #rm8",                                           "If Greater Then #rm8 = 1 else #rm8 = 0",
  831.   0F,9F,00,0,0,0,0,3,"SETNLE #rm8",       ";SETNLE #rm8",                                         "If Not Less Than or Equal Then #rm8 = 1 else #rm8 = 0",
  832.   0F,A0,00,0,0,0,0,3,"PUSH FS",           ";PUSH FS",                               "Push FS onto the Stack",
  833.   0F,A1,00,0,0,0,0,3,"POP FS",            ";POP FS",                                "Pop FS from the Stack",
  834.   0F,A3,00,0,0,0,0,3,"BT #rm16,#r16",     ";BT #rm16,#r16",                         "Carry Flag = Bit #r16 of #rm16",
  835.   0F,A3,00,0,0,1,0,3,"BT #rm32,#r32",     ";BT #rm32,#r32",                         "Carry Flag = Bit #r32 of #rm32",
  836.   0F,A4,00,0,0,0,0,3,"SHLD #rm16,#r16,#imm8",";SHLD #rm16,#r16,#imm8",              "Shift Left #rm16 #imm8 times using #r16 for input bits",
  837.   0F,A4,00,0,0,1,0,3,"SHLD #rm32,#r32,#imm8",";SHLD #rm32,#r32,#imm8",              "Shift Left #rm32 #imm8 times using #r32 for input bits",
  838.   0F,A5,00,0,0,0,0,3,"SHLD #rm16,#r16,CL",";SHLD #rm16,#r16,CL",                    "Shift Left #rm16 CL times using #r16 for input bits",
  839.   0F,A5,00,0,0,1,0,3,"SHLD #rm32,#r32,CL",";SHLD #rm32,#r32,CL",                    "Shift Left #rm32 CL times using #r32 for input bits",
  840.   0F,A6,00,0,0,0,0,4,"CMPXCHG #rm8,#r8",  ";CMPXCHG #rm8,#r8",                      "Compare and Exchange",
  841.   0F,A7,00,0,0,0,0,4,"CMPXCHG #rm16,#r16",";CMPXCHG #rm16,#r16",                    "Compare and Exchange",
  842.   0F,A7,00,0,0,1,0,4,"CMPXCHG #rm32,#r32",";CMPXCHG #rm32,#r32",                    "Compare and Exchange",
  843.   0F,A8,00,0,0,0,0,3,"PUSH GS",           ";PUSH GS",                               "Push GS onto the Stack",
  844.   0F,A9,00,0,0,0,0,3,"POP GS",            ";POP GS",                                "Pop GS from the Stack",
  845.   0F,AB,00,0,0,0,0,3,"BTS #rm16,#r16",    ";BTS #rm16,#r16",                        "Carry Flag = Bit #r16 of #rm16. Bit #r16 of #rm16 = 1",
  846.   0F,AB,00,0,0,1,0,3,"BTS #rm32,#r32",    ";BTS #rm32,#r32",                        "Carry Flag = Bit #r32 of #rm32. Bit #r32 of #rm32 = 1",
  847.   0F,AC,00,0,0,0,0,3,"SHRD #rm16,#r16,#imm8",";SHRD #rm16,#r16,#imm8",              "Shift Right #rm16 #imm8 times using #r16 for input bits",
  848.   0F,AC,00,0,0,1,0,3,"SHRD #rm32,#r32,#imm8",";SHRD #rm32,#r32,#imm8",              "Shift Right #rm32 #imm8 times using #r32 for input bits",
  849.   0F,AD,00,0,0,0,0,3,"SHRD #rm16,#r16,CL",";SHRD #rm16,#r16,CL",                    "Shift Right #rm16 CL times using #r16 for input bits",
  850.   0F,AD,00,0,0,1,0,3,"SHRD #rm32,#r32,CL",";SHRD #rm32,#r32,CL",                    "Shift Right #rm32 CL times using #r32 for input bits",
  851.   0F,AF,00,0,0,0,0,3,"IMUL #r16,#rm16",   "#r16 = #r16 * #rm16",                   "Signed Multiply #r16 by #rm16",
  852.   0F,B2,00,0,0,0,0,3,"LSS #r16,#rm32",    "SS:#r16 = #rm32",                       "Load SS:#r16 with #rm32",
  853. ; 0F,B2,00,0,0,1,0,3,"LSS #r32,#rm48",    "SS:#r32 = #rm48",                       "Load SS:#r32 with #rm48",
  854.   0F,B3,00,0,0,0,0,3,"BTR #rm16,#r16",    ";BTR #rm16,#r16",                        "Carry Flag = Bit #r16 of #rm16. Bit #r16 of #rm16 = 0",
  855.   0F,B3,00,0,0,1,0,3,"BTR #rm32,#r32",    ";BTR #rm32,#r32",                        "Carry Flag = Bit #r32 of #rm32. Bit #r32 of #rm32 = 0",
  856.   0F,B4,00,0,0,0,0,3,"LFS #r16,#rm32",    "FS:#r16 = #rm32",                       "Load FS:#r16 with #rm32",
  857. ; 0F,B4,00,0,0,1,0,3,"LFS #r32,#rm48",    "FS:#r32 = #rm48",                       "Load FS:#r32 with #rm48",
  858.   0F,B5,00,0,0,0,0,3,"LGS #r16,#rm32",    "GS:#r16 = #rm32",                       "Load GS:#r16 with #rm32",
  859. ; 0F,B5,00,0,0,1,0,3,"LGS #r32,#rm48",    "GS:#r32 = #rm48",                       "Load GS:#r32 with #rm48",
  860.   0F,B6,00,0,0,0,0,3,"MOVZX #r16,#rm8",   "#r16 = ZEROEXTEND(#rm8)",               "Extend and Move #rm8 into #r16",
  861.   0F,B6,00,0,0,1,0,3,"MOVZX #r32,#rm8",   "#r32 = ZEROEXTEND(#rm8)",               "Extend and Move #rm8 into #r32",
  862.   0F,B7,00,0,0,0,0,3,"MOVZX #r32,#rm16",  "#r32 = ZEROEXTEND(#rm16)",              "Extend and Move #rm16 into #r32",
  863.   0F,BB,00,0,0,0,0,3,"BTC #rm16,#r16",    ";BTC #rm16,#r16",                        "Carry Flag = Bit #r16 of #rm16. Compliment Bit #r16 of #rm16",
  864.   0F,BC,00,0,0,0,0,2,"BSF #r16,#rm16",    ";BSF #r16,#rm16",                        "#r16 = position of first bit in #rm16",
  865.   0F,BD,00,0,0,0,0,2,"BSR #r16,#rm16",    ";BSR #r16,#rm16",                        "#r16 = position of last bit in #rm16",
  866.   0F,BE,00,0,0,0,0,3,"MOVSX #r16,#rm8",   "#r16 = SIGNEXTEND(#rm8)",               "Sign Extend and Move #rm8 into #r16",
  867.   0F,BE,00,0,0,1,0,3,"MOVSX #r32,#rm8",   "#r32 = SIGNEXTEND(#rm8)",               "Sign Extend and Move #rm8 into #r32",
  868.   0F,BF,00,0,0,0,0,3,"MOVSX #r32,#rm16",  "#r32 = SIGNEXTEND(#rm16)",              "Sign Extend and Move #rm16 into #r32",
  869.   0F,C0,00,0,0,0,0,4,"XADD #rm8,#r8",     ";XADD #rm8,#r8",                         "Add #r8 to #rm8 and Move origional #rm8 to #r8",
  870.   0F,C1,00,0,0,0,0,4,"XADD #rm16,#r16",   ";XADD #rm16,#r16",                       "Add #r16 to #rm16 and Move origional #rm16 to #r16",
  871.   0F,C1,00,0,0,1,0,4,"XADD #rm32,#r32",   ";XADD #rm32,#r32",                       "Add #r32 to #rm32 and Move origional #rm32 to #r32",
  872.   0F,C8,00,0,0,0,0,4,"BSWAP AX",          ";BSWAP AX",                              "Convert AX between Little Endian and Big Endian",
  873.   0F,C8,00,0,0,1,0,4,"BSWAP EAX",         ";BSWAP EAX",                             "Convert EAX between Little Endian and Big Endian",
  874.   0F,C9,00,0,0,0,0,4,"BSWAP CX",          ";BSWAP CX",                              "Convert CX between Little Endian and Big Endian",
  875.   0F,C9,00,0,0,1,0,4,"BSWAP ECX",         ";BSWAP ECX",                             "Convert ECX between Little Endian and Big Endian",
  876.   0F,CA,00,0,0,0,0,4,"BSWAP DX",          ";BSWAP DX",                              "Convert DX between Little Endian and Big Endian",
  877.   0F,CA,00,0,0,1,0,4,"BSWAP EDX",         ";BSWAP EDX",                             "Convert EDX between Little Endian and Big Endian",
  878.   0F,CB,00,0,0,0,0,4,"BSWAP BX",          ";BSWAP BX",                              "Convert BX between Little Endian and Big Endian",
  879.   0F,CB,00,0,0,1,0,4,"BSWAP EBX",         ";BSWAP EBX",                             "Convert EBX between Little Endian and Big Endian",
  880.   0F,CC,00,0,0,0,0,4,"BSWAP SP",          ";BSWAP SP",                              "Convert SP between Little Endian and Big Endian",
  881.   0F,CC,00,0,0,1,0,4,"BSWAP ESP",         ";BSWAP ESP",                             "Convert ESP between Little Endian and Big Endian",
  882.   0F,CD,00,0,0,0,0,4,"BSWAP BP",          ";BSWAP BP",                              "Convert BP between Little Endian and Big Endian",
  883.   0F,CD,00,0,0,1,0,4,"BSWAP EBP",         ";BSWAP EBP",                             "Convert EBP between Little Endian and Big Endian",
  884.   0F,CE,00,0,0,0,0,4,"BSWAP SI",          ";BSWAP SI",                              "Convert SI between Little Endian and Big Endian",
  885.   0F,CE,00,0,0,1,0,4,"BSWAP ESI",         ";BSWAP ESI",                             "Convert ESI between Little Endian and Big Endian",
  886.   0F,CF,00,0,0,0,0,4,"BSWAP DI",          ";BSWAP DI",                              "Convert DI between Little Endian and Big Endian",
  887.   0F,CF,00,0,0,1,0,4,"BSWAP EDI",         ";BSWAP EDI",                             "Convert EDI between Little Endian and Big Endian",
  888. ;
  889. ; The following opcodes are either undocumented by Intel or are less
  890. ; prefered alternatives to other Opcodes.  They are included for disassembly
  891. ; purposes.
  892.   82,00,00,0,0,0,1,0,"ADD #rm8,#imm8",    ";#rm8 = #rm8 + #imm8",                   "ADD #imm8 to #rm8 ??",
  893.   82,00,08,0,0,0,1,0,"OR #rm8,#imm8",     ";#rm8 = #rm8 OR #imm8",                  "OR #imm8 to #rm8 ??",
  894.   82,00,10,0,0,0,1,0,"ADC #rm8,#imm8",    ";#rm8 = #rm8 + #imm8 + CARRY",           "Add with Carry #imm8 to #rm8 ??",
  895.   82,00,18,0,0,0,1,0,"SBB #rm8,#imm8",    ";#rm8 = #rm8 - #imm8 - CARRYFLAG",       "Subtract with Borrow #imm8 from #rm8 ??",
  896.   82,00,20,0,0,0,1,0,"AND #rm8,#imm8",    ";#rm8 = #rm8 AND #imm8",                 "AND #imm8 to #rm8 ??",
  897.   82,00,28,0,0,0,1,0,"SUB #rm8,#imm8",    ";#rm8 = #rm8 - #imm8",                   "Subtract #imm8 from #rm8 ??",
  898.   82,00,30,0,0,0,1,0,"XOR #rm8,#imm8",    ";#rm8 = #rm8 XOR #imm8",                 "Exclusive OR #imm8 to #rm8 ??",
  899.   82,00,38,0,0,0,1,0,"CMP #rm8,#imm8",    ";COMPARE #rm8 WITH #imm8",               "Compare #rm8 with #imm8 ??",
  900.   D6,00,00,0,0,0,0,2,"SETCALC",           ";SETCALC",                               "Undocumented Opcode ??",
  901.   DB,E0,00,0,0,0,1,0,"FENI",              ";FENI",                                  "Undocumented Opcode ??",
  902.   DB,E1,00,0,0,0,1,0,"FDISI",             ";FDISI",                                 "Undocumented Opcode ??",
  903.   DB,E4,00,0,0,0,1,0,"FSETPM",            ";FSETPM",                                "Undocumented Opcode ??",
  904.   F6,00,08,0,0,0,1,0,"TEST #rm8,#imm8",   ";TEST #rm8 WITH #imm8",                  "TEST (AND) #rm8 against #imm8 ??",
  905.   F7,00,08,0,0,0,1,0,"TEST #rm16,#imm16", ";TEST #rm16 WITH #imm16",                "TEST (AND) #rm16 against #imm16 ??",
  906.   F7,00,08,0,0,0,1,0,"TEST #rm32,#imm32", ";TEST #rm32 WITH #imm32",                "TEST (AND) #rm32 against #imm32 ??",
  907.   FE,00,10,0,0,0,1,0,"CALL #rm16",        ";CALL #rm16",                            "Call #rm16 ??",
  908. ; FE,00,10,0,0,1,1,0,"CALL #rm32",        ";CALL #rm32",                            "Call #rm32 ??",
  909.   FE,00,18,0,0,0,1,0,"CALL FAR #rm32",    ";CALL FAR #rm32",                        "Call FAR #rm32 ??",
  910. ; FE,00,18,0,0,1,1,0,"CALL FAR #m16_32",  ";CALL FAR #m16_32",                      "Call FAR #m16_32 ??",
  911.   FE,00,20,0,0,0,1,0,"JMP #rm16",         "GOTO #rm16",                            "Jump to #rm16 ??",
  912. ; FE,00,20,0,0,1,1,0,"JMP #rm32",         "GOTO #rm32",                            "Jump to #rm32 ??",
  913.   FE,00,28,0,0,0,1,0,"JMP FAR #rm32",     "GOTO FAR #rm32",                        "Jump to #rm32 ??",
  914. ; FE,00,28,0,0,1,1,0,"JMP FAR #m16_32",   "GOTO FAR #m16_32",                      "Jump to #m16_32 ??",
  915.   FE,00,30,0,0,0,1,0,"PUSH #rm16",        ";PUSH #rm16",                            "Push #rm16 onto the Stack ??",
  916.   FE,00,30,0,0,1,1,0,"PUSH #rm32",        ";PUSH #rm32",                            "Push #rm32 onto the Stack ??",
  917. .END
  918.  
  919.  
  920. .OPCODENAMES
  921. AAA
  922. AAD
  923. AAM
  924. AAS
  925. ADC
  926. ADD
  927. AND
  928. ARPL
  929. BOUND
  930. BSF
  931. BSR
  932. BSWAP
  933. BT
  934. BTC
  935. BTR
  936. BTS
  937. CALL
  938. CBW
  939. CDQ
  940. CLC
  941. CLD
  942. CLI
  943. CLTS
  944. CMC
  945. CMP
  946. CMPSB
  947. CMPSW
  948. CMPSD
  949. CMPXCHG
  950. CWD
  951. CWDE
  952. DAA
  953. DAS
  954. DEC
  955. DIV
  956. ENTER
  957. F2XM1
  958. FABS
  959. FADD
  960. FADDP
  961. FBLD
  962. FBSTP
  963. FCHS
  964. FCLEX
  965. FCOM
  966. FCOMP
  967. FCOMPP
  968. FCOS
  969. FDECSTP
  970. FDISI
  971. FDIV
  972. FDIVP
  973. FDIVRP
  974. FDIVR
  975. FENI
  976. FFREE
  977. FIADD
  978. FICOM
  979. FICOMP
  980. FIDIV
  981. FIDIVR
  982. FILD
  983. FIMUL
  984. FINIT
  985. FINCSTP
  986. FIST
  987. FISTP
  988. FISUB
  989. FISUBR
  990. FLD
  991. FLDCW
  992. FLD1
  993. FLDENV
  994. FLDL2E
  995. FLDL2T
  996. FLDPI
  997. FLDLG2
  998. FLDLN2
  999. FLDZ
  1000. FMUL
  1001. FMULP
  1002. FNOP
  1003. FPATAN
  1004. FPREM
  1005. FPREM1
  1006. FPTAN
  1007. FRNDINT
  1008. FRSTOR
  1009. FSAVE
  1010. FNSAVE
  1011. FSCALE
  1012. FSETPM
  1013. FSIN
  1014. FSINCOS
  1015. FSQRT
  1016. FST
  1017. FSTCW
  1018. FSTENV
  1019. FSTP
  1020. FSTSW
  1021. FNSTSW
  1022. FSUB
  1023. FSUBR
  1024. FSUBRP
  1025. FSUBP
  1026. FTST
  1027. FUCOM
  1028. FUCOMP
  1029. FUCOMPP
  1030. FXAM
  1031. FXCH
  1032. FXTRACT
  1033. FYL2X
  1034. FYL2XP1
  1035. HLT
  1036. IDIV
  1037. IMUL
  1038. IN
  1039. INC
  1040. INSB
  1041. INSW
  1042. INSD
  1043. INT
  1044. INTO
  1045. INVD
  1046. INVLPG
  1047. IRET
  1048. IRETD
  1049. JO
  1050. JNO
  1051. JC
  1052. JB
  1053. JNAE
  1054. JNC
  1055. JAE
  1056. JNB
  1057. JZ
  1058. JE
  1059. JNZ
  1060. JNE
  1061. JBE
  1062. JNA
  1063. JA
  1064. JNBE
  1065. JS
  1066. JNS
  1067. JP
  1068. JPE
  1069. JNP
  1070. JPO
  1071. JL
  1072. JNGE
  1073. JGE
  1074. JNL
  1075. JLE
  1076. JNG
  1077. JG
  1078. JNLE
  1079. JCXZ
  1080. JMP
  1081. LAHF
  1082. LAR
  1083. LEA
  1084. LEAVE
  1085. LGDT
  1086. LIDT
  1087. LGS
  1088. LSS
  1089. LFS
  1090. LDS
  1091. LES
  1092. LLDT
  1093. LMSW
  1094. LOCK
  1095. LODSB
  1096. LODSW
  1097. LODSD
  1098. LOOP
  1099. LOOPZ
  1100. LOOPE
  1101. LOOPNZ
  1102. LOOPNE
  1103. LSL
  1104. LTR
  1105. MOV
  1106. MOVSB
  1107. MOVSW
  1108. MOVSD
  1109. MOVSX
  1110. MOVZX
  1111. MUL
  1112. NEG
  1113. NOP
  1114. NOT
  1115. OR
  1116. OUT
  1117. OUTSB
  1118. OUTSW
  1119. OUTSD
  1120. POP
  1121. POPA
  1122. POPAD
  1123. POPF
  1124. POPFD
  1125. PUSH
  1126. PUSHA
  1127. PUSHAD
  1128. PUSHF
  1129. PUSHFD
  1130. RCL
  1131. RCR
  1132. ROL
  1133. ROR
  1134. REP
  1135. REPZ
  1136. REPE
  1137. REPNZ
  1138. REPNE
  1139. RET
  1140. RETF
  1141. SAHF
  1142. SAL
  1143. SAR
  1144. SBB
  1145. SCASB
  1146. SCASW
  1147. SCASD
  1148. SETO
  1149. SETNO
  1150. SETC
  1151. SETB
  1152. SETNAE
  1153. SETNC
  1154. SETAE
  1155. SETNB
  1156. SETZ
  1157. SETE
  1158. SETNZ
  1159. SETNE
  1160. SETBE
  1161. SETNA
  1162. SETA
  1163. SETNBE
  1164. SETS
  1165. SETNS
  1166. SETP
  1167. SETPE
  1168. SETNP
  1169. SETPO
  1170. SETL
  1171. SETNGE
  1172. SETGE
  1173. SETNL
  1174. SETLE
  1175. SETNG
  1176. SETG
  1177. SETNLE
  1178. SHL
  1179. SHLD
  1180. SHR
  1181. SHRD
  1182. SGDT
  1183. SIDT
  1184. SLDT
  1185. SMSW
  1186. STC
  1187. STD
  1188. STI
  1189. STOSB
  1190. STOSW
  1191. STOSD
  1192. STR
  1193. SUB
  1194. TEST
  1195. VERR
  1196. VERW
  1197. WAIT
  1198. WBINVD
  1199. XADD
  1200. XCHG
  1201. XLAT
  1202. XLATB
  1203. XOR
  1204. ; The following items are not OPCODES, but need to be recognised as
  1205. ; a valid first word.
  1206. FLAGS
  1207. WHILE
  1208. .END
  1209.